Interesting to note...perhaps Scott (world-famous Scott!) was in contact with, or observed by the folks at the Dipartimento di Ingegnaria Electronica at University of Messina who authored an article in "Review of Scientific Instruments" in 2014 describing a very low noise programmable current source using the Vishay gate driver described by Scott!This is my take on Ikoflexor's low noise measurement preamp.
I used a Vishay photovoltaic MOSFET driver (http://www.vishay.com/docs/81225/ssrvo126.pdf) in an unusual way to make a negative bias on the input JFET. This eliminates the huge capacitor in series with the 1 Ohm gain resistor. In fact there are no electrolytics in the signal path. The back to back PV arrays make a nice bipolar bias reference and you can simply flip the diodes to reverse polarity.
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Scandarra et al, "Programmable, very low noise current source", Review of Scientific Instruments 85, 125109 (2014).
thanks for that article. Unfortunately it is not open acces. Found the link here:
https://pubs.aip.org/aip/rsi/articl...-noise-current-source?redirectedFrom=fulltext
https://pubs.aip.org/aip/rsi/articl...-noise-current-source?redirectedFrom=fulltext
Also interesting:
An ultralow noise preamplifier for low frequency noise measurements
Gianluca Cannatà, Graziella Scandurra, and Carmine Cio
doi: 10.1063/1.3258197
I think I heard people mumbling that it was on scihub.
Sh***y search engine, but doi helps.
My IF3602s may find a home after all?
Gerhard
An ultralow noise preamplifier for low frequency noise measurements
Gianluca Cannatà, Graziella Scandurra, and Carmine Cio
doi: 10.1063/1.3258197
I think I heard people mumbling that it was on scihub.
Sh***y search engine, but doi helps.
My IF3602s may find a home after all?
Gerhard
Also interesting:
An ultralow noise preamplifier for low frequency noise measurements
Gianluca Cannatà, Graziella Scandurra, and Carmine Cio
doi: 10.1063/1.3258197
It has turned out in the mean time that this amplifier features the neg. real
part of the input impedance, too. (LTspice with the new TI FETs) :-(
Vishay put a model on their website, but it is "double-spaced", requiring some editing to be useable. The part is now "long lead time" but can still be found.Here is the model, symbol and the LNA schematic. IIRC the model is actually for VOM1271 but I found that it works reasonably well also for VO1263.
Attachments
In honour of Scott, who passed away recently, we are publising here the Gerber files of his LNA circuit, both the NJFET and PJFET version.
https://www.diyaudio.com/community/...urement-amp-for-ikoflexer.175044/post-4442622
https://www.diyaudio.com/community/...urement-amp-for-ikoflexer.175044/post-5007920
The XEN logo has been replaced by "In Fond Memories of Scott Wurcer".
As far as I can remember, and it has been quite a few years now, the Gerber files are accurate and bug free.
But I am sure you can easily trace the circuit on the board before soldering.
The BoM will need a few more days, so that I can check availability, etc.
Patrick
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https://www.diyaudio.com/community/...urement-amp-for-ikoflexer.175044/post-4442622
https://www.diyaudio.com/community/...urement-amp-for-ikoflexer.175044/post-5007920
The XEN logo has been replaced by "In Fond Memories of Scott Wurcer".
As far as I can remember, and it has been quite a few years now, the Gerber files are accurate and bug free.
But I am sure you can easily trace the circuit on the board before soldering.
The BoM will need a few more days, so that I can check availability, etc.
Patrick
.
Attachments
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Isn't it possible to use the input JFet without bias voltage and source resistor at Vgs = 0, because the signal voltages are so small ?
Sorry for ignoring the question.
With FETs, gm is proportional to the root of Id. Noise goes down with the root of gm.
So, maximizing the current pays only with the 4th root. Idss (Vgs=0) is the maximum
current a JFET is probable to see.
Using more FETs in par is more attractive than having only one JFET sweat.
It is possible. But, it's still better to invest in more FETs than in more current.
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Semiconductor physics isn't my forte, but I think your position is more correct than the professor's.
There is a an inherent diode junction gate-to-channel, but the applied signal is small. Conduction should be no more than that of a small signal diode near the origin in the I/V plane. Less in fact, since the voltage channel to gate sees increasing reverse bias along the length of the channel until it reaches the drain voltage, some few volts above ground assuming active operating point. Said differently, the gate is at 0V re the channel only at the source end of the channel where source is same potential as gate.
There is a an inherent diode junction gate-to-channel, but the applied signal is small. Conduction should be no more than that of a small signal diode near the origin in the I/V plane. Less in fact, since the voltage channel to gate sees increasing reverse bias along the length of the channel until it reaches the drain voltage, some few volts above ground assuming active operating point. Said differently, the gate is at 0V re the channel only at the source end of the channel where source is same potential as gate.
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