Marantz CD-74 NOS mod problem - Help!

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Hi Guys,
My Marantz is distorting badly when I attempt to do the NOS mod. I've done this mod to quite a few other TDA1540 based machines with excellent results but it is just not working on the CD-74.
I normally remove the 7030 filter chip, put in the four link wires and then isolate pin 16 of the SAA7000 and pull the pin up via a 1k resistor to pin18 to put it into 14 bit mode. I have tripple checked my wiring and ensured that no tracks were broken when I removed the filter.
I have just put the SAA7030 back in and grounded pin 16 on SAA7000 to make it 16 bit again and it works without distortion. What is occuring?
Looking at the schematics for a CD-74 and a Philips CD-104, I cant see any differences in the connections or why the NOS mod won't work.
I noted that on the CD-74s PCB there is a 1k SMD resistor connected to pin17 of the SAA7000 which is grounded at the other end to pin 16 (which was grounded but now isolated from ground and pulled up high), so I have isolated this resistor from pin 16 and taken a wire from the resistor to another ground point.
I have no idea what could be going on - can anyone help?
Thanks,
Phil
 
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Where does latch come from on the CD-104? On the diagram it references location 93 but where is that? On the CD-74 the latch comes from the SAA7000 pin 11 and goes to pin 2 of the DACs, on the CD-104 it comes from who knows where (not the SAA7000), goes to the filter pin 7 then to the DACs. I reckon this is the reason the NOS mod doesn't work on the CD-74 as there is a problem with the clock! Perhaps I should have cut the Latch coming from the SAA7000 going to the DAC - I'm confused!?
 
Thanks for your input, I was correct in my assumption to remove the LAT clock from the SAA7000 and go through the filter pin 7 which links to Pin 21 in the NOS mod. It works perfectly now, and incidently the reclocking method I use is more comprehensive than the diagram you sent.
 
I built and sketched the mod myself. Since jitter is determined by the latch rising edge accuracy only, I did not find necessary to reclock the data. I used fast SN74S74N, not sure if it is still available. The pinout of OPA627 is standard. The mod works well, in spite of being 14-bit.
 
Also what about propogation delay? Surely the clock is going to be out of sync with the data by a fraction which would introduce jitter. If you were just cleaning up the master clock that would be different, but the latch is generated by CLOX and needs to be in perfect sync with data. Or am I talking rubbish?
 
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Clock is not used by the DAC chip. It works like this: data bits are entering in an internal register and they are waiting there. After all 14 data bits are in the register, the latch signal (STR1/strobe or LE/latch enable) rising edge will switch the register contents onto the 2R/R ladder, thus the conversion happens. The register contents are present on the ladder until the next latch signal. It is irrelevant how inaccurately are the data bits pacing in the register. Only the readout should be very accurate, and this is provided by the accuracy of the leading edge of the latch signal. This operation mode is completely different (and IMHO better) than the operation of I2S.
 
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