My Kwack clock implementation

Andypairo · 18th December 2003, 05:40 PM

First of all I want to thank Elso for sharing his project.

Of course my implementation doesn't claim to be state of the art, since it's made on veroboard without a great experience on HF layout, but I thought it could be nice to share my building experience and to receive a feedback from who has built it (and from Elso, of course!).

I borrowed (again

) a digicam and took a few shots.

Pic 1: the assembly

Andypairo · 18th December 2003, 05:42 PM

2nd pic: a closeup of the board

As you can see I used a MAX913 as comparator and also a J310 instead of J309 as JFet.
The crystal comes from Elso so it can't be bad

Andypairo · 18th December 2003, 05:43 PM

Pic 3 output waveform

Not bad at all, considering that for now I only adjusted the duty cycle roughly

Andypairo · 18th December 2003, 05:45 PM

Pic 4: voltage at the gate of the JFET.. a good sinewave

Andypairo · 18th December 2003, 05:47 PM

Last pic.. voltage at source of Jfet.. can someone explain why the waveform has a bump?

Should I try swapping the fet with another model or I'd better change the value of the source resistor (or what else)?

Cheers

Andrea / waiting for comments

Andypairo · 18th December 2003, 06:41 PM

While taking further measurements to get rid of this bump I noticed the extreme sensitivity of the node connected to the source to capacitive loading to ground... I should have realized that before (the cap to gnd is only 39 pF !) but all became clear whan I left out the cap and connected my oscilloscope probe (10x)... I got a nearly perfect sinewave!
Then connected the same probe to the output and.. nothing! The oscillator had stopped working...

Conclusion: the bump is probably due to the capacitance of the probe

Cheers

Andrea / who enjoys learning from building circuits

Elso Kwak · 19th December 2003, 03:35 PM

Hello Andrea,
You got decent squarewaves indicating a working clock. The "bumps" you mentioned are not important at all.
One of my first faults was connecting a 1x probe to a CMOS oscillator as it stopped working immediately. Yes ordinary probes have capacitance too.
I am using other kind of parts but I have seen pictures of the KC with all kinds of parts. Here is another one (not by me)

zygibajt · 19th December 2003, 03:51 PM

Hi,
I'm just finishing mine on vero board ,too.Had put it together week ago but waited for J309 to arrive (thanks Elso for J309,i just recived it a couple of hours ago).

I'm just not qiute sure how the pin-out of J309 is and how to put it into circuit.

I assume drain goes to + supply,source to crystal and gate to AD8651 and to ground trought 1Kohm resistor.

Is it correct??

Bartek

Elso Kwak · 19th December 2003, 04:04 PM

Quote:

Originally posted by zygibajt
Hi,
I'm just finishing mine on vero board ,too.Had put it together week ago but waited for J309 to arrive (thanks Elso for J309,i just recived it a couple of hours ago).

I'm just not qiute sure how the pin-out of J309 is and how to put it into circuit.

I assume drain goes to + supply,source to crystal and gate to AD8651 and to ground trought 1Kohm resistor.

Is it correct??

Bartek

Hello Bartek,
See this site for pinouts by Yeo :http://www.diyparadise.com/clock.html
It is Drain to supply, Source to 1k and Gate to crystal.

zygibajt · 19th December 2003, 04:08 PM

Thanks a lot.

Maybe i will put some photos tomorrow if I get the camera.

For now I will use it with CDP supply but will build separate this coming week.

Bartek

18th December 2003, 06:41 PM	#6
Andypairo diyAudio Member Join Date: Sep 2002 Location: near Milano , Italy	to bump or not to bump... While taking further measurements to get rid of this bump I noticed the extreme sensitivity of the node connected to the source to capacitive loading to ground... I should have realized that before (the cap to gnd is only 39 pF !) but all became clear whan I left out the cap and connected my oscilloscope probe (10x)... I got a nearly perfect sinewave! Then connected the same probe to the output and.. nothing! The oscillator had stopped working... Conclusion: the bump is probably due to the capacitance of the probe Cheers Andrea / who enjoys learning from building circuits

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19th December 2003, 03:51 PM	#8
zygibajt diyAudio Member Join Date: Jun 2003 Location: Wroclaw	Hi, I'm just finishing mine on vero board ,too.Had put it together week ago but waited for J309 to arrive (thanks Elso for J309,i just recived it a couple of hours ago). I'm just not qiute sure how the pin-out of J309 is and how to put it into circuit. I assume drain goes to + supply,source to crystal and gate to AD8651 and to ground trought 1Kohm resistor. Is it correct?? Bartek

19th December 2003, 04:08 PM	#10
zygibajt diyAudio Member Join Date: Jun 2003 Location: Wroclaw	Thanks a lot. Maybe i will put some photos tomorrow if I get the camera. For now I will use it with CDP supply but will build separate this coming week. Bartek