Hello,
Just installed the little circuit board on the DDDAC mainboard. Will have to close the chassis, move it from kitchen table onto a temporary position connect the clock circuitry from Andrea, Roon Nucleus, pre amp to check if it works.
If it works i will make a donation to help Doede with his blog.
My conclusion so far won't buy circuitry anymore that uses these u.fl microscopic connectors. The only reason i proceeded was the big investment in money and time i made so far.
Greetings, Eduard
Just installed the little circuit board on the DDDAC mainboard. Will have to close the chassis, move it from kitchen table onto a temporary position connect the clock circuitry from Andrea, Roon Nucleus, pre amp to check if it works.
If it works i will make a donation to help Doede with his blog.
My conclusion so far won't buy circuitry anymore that uses these u.fl microscopic connectors. The only reason i proceeded was the big investment in money and time i made so far.
Greetings, Eduard
D
Deleted member 537459
I listen to impressions of @andrea mori's dac lite
https://www.diyaudio.com/community/...discrete-dac-with-digital-calibration.386076/
https://www.diyaudio.com/community/...discrete-dac-with-digital-calibration.386076/
will you build a balanced TDA dac with the second board? I would love to hear the comparison between a balanced TDA dac and the version of Andrea.
ilgravo, I have followed with interest your comments on Andreas FIFO results with you DAC and his FIFO plus Lite DAC setup.
Could you comment on the way that you want to implement sign magnitude with the second board? I have myself a few of Ryan's boards (but almost no parts yet).
Have you ever tried an active I/V with Ryans board? Your comment on your setup (even with the FIFO) vs Andreas full setup have made me wonder which way to go.
Could you comment on the way that you want to implement sign magnitude with the second board? I have myself a few of Ryan's boards (but almost no parts yet).
Have you ever tried an active I/V with Ryans board? Your comment on your setup (even with the FIFO) vs Andreas full setup have made me wonder which way to go.
For anyone interested, attached is a pic of the test setup. The piece of wood more of the stuff is mounted on is sized to drop into an empty file server steel case. The metal case is for shielding to check if local environmental RFI/EMI has any audible effect on SQ.
All voltage regulators are on their own transformer windings. No center-tapped windings are used so that grounds/commons will be defined at the loads only. For +-15v regulation, dual positive regulators are used to provide matched regulator characteristics to both rails (e.g., matched FR, phase response, output impedance, etc.).
The dual 4v regulators are for DAC_Lite +-Vref rails. A different type of Vref regulator will be tried to see how that affects perceived SQ. That's being done because DAC SQ in general tends to be sensitive to Vref (sometimes referred to as 'AVCC' by some manufacturers) regulator design.
All voltage regulators are on their own transformer windings. No center-tapped windings are used so that grounds/commons will be defined at the loads only. For +-15v regulation, dual positive regulators are used to provide matched regulator characteristics to both rails (e.g., matched FR, phase response, output impedance, etc.).
The dual 4v regulators are for DAC_Lite +-Vref rails. A different type of Vref regulator will be tried to see how that affects perceived SQ. That's being done because DAC SQ in general tends to be sensitive to Vref (sometimes referred to as 'AVCC' by some manufacturers) regulator design.
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How does one set up the test to figure that out? Please share the details since the audible effects are important in audio.
If perceivable but not audible, then who cares?
@swak, IMHO for asynchronous USB we don't really need a FIFO, since the dac and the USB board can all be in the same clock domain. Also IMHO, a FIFO is most useful when there is a mix of clock domains, such as when using SPDIF/TOSLINK/AES and or maybe for HDMI. That said, FIFO_Lite also does isolation, which can be useful if using a USB board that does not include isolation from PC ground and power noise (I2SoverUSB in particular does provide galvanic isolation).
Of course, to get best performance if using I2SoverUSB, an external MCLK source is required (I2SoverUSB clocks are good, but external can be better). In that case, I2SoverUSB needs 45/49MHz external clocks which can be expected to have higher levels of phase noise than lower frequency clocks of the same general quality. For that reason I use a frequency multiplier to generate the clocks for I2SoverUSB, then reclock its I2S output with lower frequency, lower phase noise clocks. Once again IMHO, it can get a bit complicated if the lowest phase noise is wanted. Alternatively, using an off the shelf FIFO is one way to simplify the design work required for a given level of phase noise performance.
Of course, to get best performance if using I2SoverUSB, an external MCLK source is required (I2SoverUSB clocks are good, but external can be better). In that case, I2SoverUSB needs 45/49MHz external clocks which can be expected to have higher levels of phase noise than lower frequency clocks of the same general quality. For that reason I use a frequency multiplier to generate the clocks for I2SoverUSB, then reclock its I2S output with lower frequency, lower phase noise clocks. Once again IMHO, it can get a bit complicated if the lowest phase noise is wanted. Alternatively, using an off the shelf FIFO is one way to simplify the design work required for a given level of phase noise performance.
Mark, I really appreciate your comments, in my case I will only have one I2S signal coming form the JLsounds card.
I was thinking too (specially before I started considering Andreas FIFO more seriously, but now certainly again) to use an external clock for the I2soverUSB (as I only have/use/need 44.1kHz material I thought just to set up Andreas 45 MHz clock externally).
I thought using multipliers to reach a higher frequency introduced similar phase noise as higher base freq. clocks, so I had not thought of your way of doing it. I agree it gets more complicated.
Now, what Wealas says here sounds pretty good (thanks for your comment too!). I had always assumed the XMOS devices needed those high freq clocks, buy I just checked the datasheet for the XU208, and that seem not to be the case. This would be really good. I'll get in touch with them.
Finally, Andrea also has the TWSAFB-OI , which he uses to clean BCK, DR, DL from his FIFOS FPGA. Do you think this could help after the I2SoverUSB board too (I am connecting the I2SoverUSB to TDA1541 and AD1862 dacs)?
I was thinking too (specially before I started considering Andreas FIFO more seriously, but now certainly again) to use an external clock for the I2soverUSB (as I only have/use/need 44.1kHz material I thought just to set up Andreas 45 MHz clock externally).
I thought using multipliers to reach a higher frequency introduced similar phase noise as higher base freq. clocks, so I had not thought of your way of doing it. I agree it gets more complicated.
Now, what Wealas says here sounds pretty good (thanks for your comment too!). I had always assumed the XMOS devices needed those high freq clocks, buy I just checked the datasheet for the XU208, and that seem not to be the case. This would be really good. I'll get in touch with them.
Finally, Andrea also has the TWSAFB-OI , which he uses to clean BCK, DR, DL from his FIFOS FPGA. Do you think this could help after the I2SoverUSB board too (I am connecting the I2SoverUSB to TDA1541 and AD1862 dacs)?
I have played with I2SoverUSB alone vs I2SoverUSB + reclocker vs I2SoverUSB + Ian's fifo. Same crystek clocks in reclocker and fifo. Reclocker alone sounds quite a bit better, fifo sounds dramatically better. Obviously not all dacs illustrate these differences to the same degree.
@analog_sa,
A reclocker could be thought of as a very short FIFO (one with less than one clock period of delay). That observation suggests that implementation details might account more for the reported difference between reclocking and FIFO, as opposed to a difference in principle between the two circuit concepts (for the case of asynchronous USB, used with an otherwise fully synchronous dac)?
A reclocker could be thought of as a very short FIFO (one with less than one clock period of delay). That observation suggests that implementation details might account more for the reported difference between reclocking and FIFO, as opposed to a difference in principle between the two circuit concepts (for the case of asynchronous USB, used with an otherwise fully synchronous dac)?
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Perhaps so, but unlikely in this particular context. The reclocker is the matching board for the I2SoverUSB with a nice adm7150 feeding the oscillators. I have not compared the exact types of D-ff which do the actual reclocking but do not expect huge differences there. The absence of long micro bncs on the stacked reclocker board is also a plus.
To me it's hardly surprising, given equal implementation, that a fifo is better.