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SRC4392 problem with DIR / SPDIF
SRC4392 problem with DIR / SPDIF
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Old 5th October 2019, 03:35 PM   #51
Markw4 is offline Markw4  United States
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vcelkamaja,
Good to hear you are making progress. The problem had to be closely linked to something happening (or not) right around power-on. Knowing that much, the search space for finding the problem becomes much smaller.
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Old 5th October 2019, 05:11 PM   #52
JohnW is offline JohnW  Hong Kong
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Quote:
Originally Posted by vcelkamaja View Post
Thanks John -this helped, first success By disabling the JTAG I have pulled A1 down so I have address E0 as expected. It seems JTAG active was really the issues. I have re-flashed firmware in both speaker and:

- one seems to be working ok (at least for now)
- the other one still no output signal

I tried to:

- read SRC4392 registers drom both and they are ok -correct values
- check status by reading registers 13 and 14 and there is an issue here:
- leaft speaker (working)- reg 14 shows 00 - no error, reg 13 shows 03 - ok, max available RXCKO freq
- right speaker (not working) - reg 14 shows 04 - error of not locking, reg 13 shows 00 - not ok

So it seems the right speaker still has an issue with DIR in SRC4392. I will try to power it on and off over the day to check whether left soeaker is still ok and right not working or whether it is still unstable - sometimes ok, sometimes not
Well some progress , Just to confirm you are performing a"Hard" Reset (GPIO Toggle) on powerup, not just a software Reset (they are not the same function).

Its important to scope the Reset line to confirm....
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Old 5th October 2019, 05:14 PM   #53
JohnW is offline JohnW  Hong Kong
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Sounds exciting, all right. Please keep those of us interested in dac development updated from time to time. Be nice to hear your dac when you are ready.

-Mark
Thanks Mark, We are also excited about the design (: Might start a thread here once we are close (hopefully next PCBs) - it would give some insight into Discrete DAC design
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Old 6th October 2019, 10:44 AM   #54
vcelkamaja is offline vcelkamaja  Czech Republic
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Just made some measurements - the behavior of Reset looks ok - clear 3.3V (high), after 1 second going down for 20ms and then back up to high. Exactly following source code. Measured on the reset pin of SRC4392.

Also checked spdif input - looks ok, Vpp 400 mV. All power supplies clean, registers properely configured. One speak ok, the other one not able to lock (DIR SRC4392). Iím still thinking how to check the staus of DIR - SPDIF signal looks ok, MCLK as clock inout also ok. Registers properely configured (same for both speakers). But when I read lock bit or measure at lock pin it is not locked. Any idea what should try to do with DIR to check what can be wrong? One other thing I will try is to change Rx input - just in case it is destroyed or so.


Quote:
Originally Posted by JohnW View Post
Well some progress , Just to confirm you are performing a"Hard" Reset (GPIO Toggle) on powerup, not just a software Reset (they are not the same function).

Its important to scope the Reset line to confirm....
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Old 6th October 2019, 11:09 AM   #55
MarcelvdG is online now MarcelvdG  Netherlands
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Sounds like a sensible experiment. Do you see about the same DC bias voltage on all RX inputs, both positive and negative, when measured at the capacitor terminals?
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Old 6th October 2019, 11:59 AM   #56
vcelkamaja is offline vcelkamaja  Czech Republic
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Actually this is what is likely wrong - I have once more double checked critical signals and voltages on SRC4392 pins and everything seems to be ok. So I did one last check to feed SPDIF signal to a different RX input (RX2 —> RX3) and voila, it works now... just to make sure it is not only an accidnet I heated all solde junctions on tha path between input terminal and RX pins of SRC4392 and moved input back to the original one (RX2) and nothing... so I think something happened with RX2 pins as when I switch to RX3 now again it works.

I have only connected spdif CINCH connected from source signal to SRC4392 input circuit, so not sure what happened. Maybe some ESD or so?
I use stabdard input curcuit per SRC4392 datasheet - Resistor and two capacitors.

I also thought about the DC offset you mentioned but as there are series capacitor going to RX input it shouldn’t be an issue, or? I will double check the DC offset. What I know is thar RX- pin shows V high DC voltage only (3.3 or 1.8V?) while RX+ whows digial signal with 2.82 MHz Vpp ~ 400 mV (for 44.1kHz sampling rate)


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Sounds like a sensible experiment. Do you see about the same DC bias voltage on all RX inputs, both positive and negative, when measured at the capacitor terminals?
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Old 6th October 2019, 12:07 PM   #57
MarcelvdG is online now MarcelvdG  Netherlands
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I only mentioned checking the DC bias on the SRC4392-side of the capacitors, as that is a simple way to check whether the caps actually make contact with the SRC4392 inputs and are not shorted to ground or so.
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Old 8th October 2019, 03:50 AM   #58
JohnW is offline JohnW  Hong Kong
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Quote:
Originally Posted by vcelkamaja View Post
So I did one last check to feed SPDIF signal to a different RX input (RX2 ó> RX3) and voila, it works now... just to make sure it is not only an accidnet I heated all solde junctions on tha path between input terminal and RX pins of SRC4392 and moved input back to the original one (RX2) and nothing... so I think something happened with RX2 pins as when I switch to RX3 now again it works.

I have only connected spdif CINCH connected from source signal to SRC4392 input circuit, so not sure what happened. Maybe some ESD or so?
RCA connectors (what you call CINCH) are a badly designed connector - anyone working in a Digital audio service department will be aware of blown SPDIF inputs.

The trouble with the RCA Phono connector is that the center contact is made first before the Ground collar - this results in Earth leakage currents (which can be surprisingly high in todays environment of Switch Mode PSU's everywhere).

This Earth leakage Current goes straight into the input stage the SPDIF receiver...
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Old 8th October 2019, 04:53 PM   #59
vcelkamaja is offline vcelkamaja  Czech Republic
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Thanks John. Will serial capacitor and 75 ohm resistor help with this current issue? Iím also thinking whether using input transformer can help too.

The other thing is some potential DC offset which may or may not influence whether SRC4392 input circuit sees the right input signal (ďlogicĒ levels). I need to check it with the scope as suggested above.


Quote:
Originally Posted by JohnW View Post
RCA connectors (what you call CINCH) are a badly designed connector - anyone working in a Digital audio service department will be aware of blown SPDIF inputs.

The trouble with the RCA Phono connector is that the center contact is made first before the Ground collar - this results in Earth leakage currents (which can be surprisingly high in todays environment of Switch Mode PSU's everywhere).

This Earth leakage Current goes straight into the input stage the SPDIF receiver...
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Old Yesterday, 05:36 PM   #60
vcelkamaja is offline vcelkamaja  Czech Republic
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Ok, so I thought I will share the latest update
It seems that there were 3 different issues impacting unstable behavior of my design - digital speakers:

1. Disabling JTAG on the Atmel controller - same pins used to control SRC4392 (reset on) - sometimes worked and sometimes not - disabling JTAG solved it

2. Damaged SPDIF input of SRC4392 - maybe I destroyed it by manipulating with spdif input cables? By switching input to another one it started working (right speaker only)

3. Unstable power on - sometimes both left (master) and right (slave) speakers worked, sometimes not and sometimes right (slave) worked only - after some analysis I recognized that left (master) speaker sometimes showed NACK on I2C bus - SRC4392 and / or other TAS I2C slave circuits wernít configured after power on - bad soldering of I2C pull up resistor...

Iím playing the music for last two weeks without issue so hopefully my problem is fixed now

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