easyDAC = NOS R-2R AD1862 DAC + Headphone Amp

I like DACs powered directly from USB in small case/design and I like sound based on R-2R. This was reason why this toy was created.

Here in gallery are pictures: DAC gallery

Once again small description:
  • NOS R-2R AD1862 DAC
  • LINE-out direct from I/V
  • headphone out based on TPA6120A2 with potentiometer, easily drives big headphones with a lot of power (AKG K701)
  • no additional filters (only RC)
  • no caps in series with signal line
  • switch between line or headphones (no need unplug something when I choose between headphones or amp), with relays
  • for USB/I2S conversion is used PCM2706 (on board are also pins for another I2S), simplicity, no additional drivers, I like Plug&Play and I am listening mostly in 16bits
  • power from usb is converted with isolated DC-DC DCP0205xx, regulated to +-5V for digital and AD1862 digital, +-12V for AD1862 analog and I/V, +-5V for headphones amp TPA6120A2
  • it can handle custom I/V boards in small design, +-12V
  • 4 layers board

I am not sure if it is DIY project, becase it is full of small 0805 SMD parts and few SMD ICs, board is 4-layers

Some build hints:

  • first mount USB/i2s part and test with scope if some data signals are going out from i2s
  • continue with power supply part and test, if all voltages are right
  • dont forget for thermal pad holes
  • mount DAC portion with relay, switch and I/V
  • connect it to PC and measure with scope if sine is right (or test sound directly), because in this state it must working
  • if all is right, mount headphones amp part, better if you buy 3 potentetiometers and measure them for resistance offset (left and right) in few places and choose best one (with lowest offset), dont forget carefully solder TPA6120 through thermal pad hole
  • connect it to PC and measure dc offset on headphones connector, it must be small offset, about few mV
  • if you wish, you can clean board from solder resin using isopropyl alcohol
  • I used SMD thick resistors
  • as I/V opamp choose something good, like LM6171, LME49990, ADA4898-1, and many others ...
  • if you use external USB/I2S (for example asynchronous XMOS) resistors R6, R7, R8 can be disconnected and also PCM2706 power jumper opened ... on board are pins for I2S https://ctrlv.cz/shots/2017/09/19/DGlu.png
  • output voltages can be easily set with change in feedback resistors R9,R10, or for headphones in gain R17+R18, R21+R22
  • when you use fast I/V opamp, like AD844, only to be sure - check output for oscillations, I have no oscillations
  • only to mention, here is no headphones protection circuit, so after every change in I/V measure headphones output if there is not big DC offset, must be few mV
  • in normal condition, there is no clunking in headphones when switch position is changed or device is disconnected
  • use linear potentiometer (if there is a link for logarithmic, use linear)

I need thanks to pavouk.org site from where I got I2S/PCM logic and thanks to Dohny for hint about DCP0205xx DC-DC.
 

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you can not replace PCM2706 with PCM1794
... but if you need higher resolution 24/192, instead of PCM2706 use XMOS USB/I2S board (here are many, from diyinhk, jlsounds)
on my DAC are pads where you can connect I2S pins from XMOS board
 
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asynchronous mode decrease jitter in sound and it is in theory good for sound result ... it is why I added these pins for connecting advanced I2S like xmos boards ... this advantage is measurable with super high end devices and was done many times, with devices ...

now back in human ear reality ... know somebody from how much pS/nS/uS is jitter listenable for human ear? ... personally, when I was switching between these xmos devices and PCM2706 in 16b/44khz, I have not heard difference with my ears ... I did these listenable tests, because I am going to do DAC with PCM1704 and I need be sure ...
 
...But what is certain with asynchronous sampling-rate conversion is that your original signal is recalculated so bit-perfectness goes down the drain.

//

Synchronous sample rate conversion (oversampling) also alters the original data. That’s what digital filters do, alter the data fed them. Analog filters also alter the original analog signal. Filtering in general alters the original signal. That’s it’s purpose.

I’m aware that Schitt talks about ‘closed-form’ digital filtering which retains the original samples. I know of no technical reason why this would produce more accurate reconstruction filtering. I suspect this is more playing on audiophile intuitions, which typically don’t apply to digital signal processing, as it tends to be non-intuitive.
 

TNT

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Problem is that many implementations get asynchronous again after i2s so not much gained. Like ESS - and they use ARC. Waist of good clocks on the "Amanero" boards.

But yes - the USB-i2s is not ARC it's a synchronisation protocol working there.

//
 
Problem is that many implementations get asynchronous again after i2s so not much gained. Like ESS - and they use ARC. Waist of good clocks on the "Amanero" boards

//

Not sure if this is an appropriate venue for such a discussion, but anyway.

An anecdotal observation: my ESS dac, run in the async mode had a definite preference for Ian's fifo upstream and was super sensitive to the clocks and the way they were powered. Briefly tried the sync mode and hated it, as it made a mess of the bass. It is perhaps down to the way the asrc in the ESS works, but at least IME input jitter still matters a lot.
 
Delta-Sigma DACs are extremly sensitive to jitter and clock signal.
A quality R-2R chip is much much less sensitive to jitter and clock. That is why one can achieve very good results with R-2R DACs in a simple design, the sound still be faithful to the source.

With a bad clock and a bad digital filter nearly each delta-sigma DAC sounds awfull, sound like from an empty sewage.
 
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Delta-Sigma DACs are extremly sensitive to jitter and clock signal.
A quality R-2R chip is much much less sensitive to jitter and clock. That is why one can achieve very good results with R-2R DACs in a simple design, the sound still be faithful to the source.

With a bad clock and a bad digital filter nearly each delta-sigma DAC sounds awfull, sound like from an empty sewage.

In full agreement.
 
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Joined 2017
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Delta-Sigma DACs are extremly sensitive to jitter and clock signal.
A quality R-2R chip is much much less sensitive to jitter and clock. That is why one can achieve very good results with R-2R DACs in a simple design, the sound still be faithful to the source.

With a bad clock and a bad digital filter nearly each delta-sigma DAC sounds awfull, sound like from an empty sewage.


That's the point. :)If you use IIS of Rpi without clock compensation, your DSM DAC ends up a mess because of jitter. But R2R DAC has almost no degradation with a jittery clock since the sensitivity depends on the output frequency. R2R has the raw audio band(0 to 20kHz) while DSM actually has more than few mega Hz. You should take different care about jitter. Your resource must be concentrated on things besides jitter to make the best of the budget if your DAC is R2R.
 
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Joined 2019
most of us listen to music

What about the noise floor of poor crystal between 1 Hz to 100 Hz please ?

Doesn't it matter for a R2R dac chips as well ?

Seems a lot of people even for old PCM dacs or R2R discrete dacs take care of that by benchmarking the clock looking at their noise floor of such law frequencies : CCHA-957, NDK-A, Pulsar Clock and so on ? FGPA clocks giving often bad sounding results versus "good enough" Crystal clocks. Is it a myth ?
 
What about the noise floor of poor crystal between 1 Hz to 100 Hz please ?

Doesn't it matter for a R2R dac chips as well ?

Seems a lot of people even for old PCM dacs or R2R discrete dacs take care of that by benchmarking the clock looking at their noise floor of such law frequencies : CCHA-957, NDK-A, Pulsar Clock and so on ? FGPA clocks giving often bad sounding results versus "good enough" Crystal clocks. Is it a myth ?

sorry for a late reply, R2R is not sensitive to the clock, if an oversampling or upsampling is used, then the clock should be more accurate (and here it can matter), but it's not as critical as by delta-sigma
FPGA is fine even if the BCK and LRCK is internaly generated, it should be a clean clock, no missing BCK cycles and LRCK aligned