Hi Ray and Leadbelly,
I would consider it an honour if anyone started a group buy for any of my hobby projects or derivatives of those. I hope it would work out better than the previous group buy attempt, though.
Like Ray already wrote, you have to keep in mind that this is so far only a paper design. The DAC cores and reference are the exact same as what is playing in my living room at this very moment, but the input interfaces for the external clock and data signals only exist on paper so far. They are simple circuits, so I have good hope that they either work or can be made to work without PCB redesign, but still.
Regarding Ray's question, it should be possible to make a solid-state circuit that generates the clock and the sigma-delta modulates from PCM input data using an FPGA module and one or two crystal oscillators. If you have no objections against asynchronous sample rate conversion, you could use a part of my solid-state DAC for that, or even no FPGA at all, but an ASRC chip with built-in sigma-delta like the AK4137EQ (AK4137EQ | Product | AKM - Asahi Kasei Microdevices).
If you prefer to avoid asynchronous sample rate conversion, xx3stksm might have a good solution. I know he has made several FPGA-based sigma-delta DACs, both single-bit (as you would need in this case) and multibit.
I would consider it an honour if anyone started a group buy for any of my hobby projects or derivatives of those. I hope it would work out better than the previous group buy attempt, though.
Like Ray already wrote, you have to keep in mind that this is so far only a paper design. The DAC cores and reference are the exact same as what is playing in my living room at this very moment, but the input interfaces for the external clock and data signals only exist on paper so far. They are simple circuits, so I have good hope that they either work or can be made to work without PCB redesign, but still.
Regarding Ray's question, it should be possible to make a solid-state circuit that generates the clock and the sigma-delta modulates from PCM input data using an FPGA module and one or two crystal oscillators. If you have no objections against asynchronous sample rate conversion, you could use a part of my solid-state DAC for that, or even no FPGA at all, but an ASRC chip with built-in sigma-delta like the AK4137EQ (AK4137EQ | Product | AKM - Asahi Kasei Microdevices).
If you prefer to avoid asynchronous sample rate conversion, xx3stksm might have a good solution. I know he has made several FPGA-based sigma-delta DACs, both single-bit (as you would need in this case) and multibit.
I still had to get back to the reconstruction filter. Assuming third order Butterworth at 45 kHz is enough and that you want a single-ended output:
Ground the negative DAC outputs; C29 and C51 can be left out, but C32 and C54 are definitely needed.
Change C28 and C50 to 6.8 nF
Connect each positive DAC output to a 3.9 mH inductor (can be made with 125 turns of wire on a 250 nH/winding^2 soft ferrite potcore, but maybe there are cheaper options, like this: https://nl.farnell.com/wurth-elektr...h-5-8-3x8-3mm-power/dp/2211723?st=WE-TI 3.9mH They are not designed for low distortion, but the signal levels are way below what they can handle, and they are reasonably accurate.)
Connect the other side of each inductor to 2.2 nF in parallel to 820 ohm (or 825 ohm) to ground.
Connect the output connector across the 2.2 nF // 820 ohm.
Ground the negative DAC outputs; C29 and C51 can be left out, but C32 and C54 are definitely needed.
Change C28 and C50 to 6.8 nF
Connect each positive DAC output to a 3.9 mH inductor (can be made with 125 turns of wire on a 250 nH/winding^2 soft ferrite potcore, but maybe there are cheaper options, like this: https://nl.farnell.com/wurth-elektr...h-5-8-3x8-3mm-power/dp/2211723?st=WE-TI 3.9mH They are not designed for low distortion, but the signal levels are way below what they can handle, and they are reasonably accurate.)
Connect the other side of each inductor to 2.2 nF in parallel to 820 ohm (or 825 ohm) to ground.
Connect the output connector across the 2.2 nF // 820 ohm.
Thanks again Marcel.
And for a balanced version of this filter use inductors of half the value (1.85mH) in the positive and negative lines (and the 2.2 nF in parallel with 820 ohm between the positive and negative lines).
Just keeping options open on the output for now. I may experiment with transformers or the Broskie BCF to convert to single-ended output.
Ray
With apologies up-front to Marcel for any frustation or annoyance I may engender with this post...
I've been thinking this project over from the perspective of a potential group buy and my own preferences.
Although I would be keen to run a GB I am not convinced that there will be much interest as this is a niche interest, compuned by the high cost of the monolithic PCB but also, implicit in the approach with the PCB, the lack of flexibility offered - for example, what if I want to run a regulated 300V supply?
The heart of this design is the valve-based dac core and voltage reference and I think the focus should be on that in the first instance. Here are some points to summarise my thinking;
Ray
I've been thinking this project over from the perspective of a potential group buy and my own preferences.
Although I would be keen to run a GB I am not convinced that there will be much interest as this is a niche interest, compuned by the high cost of the monolithic PCB but also, implicit in the approach with the PCB, the lack of flexibility offered - for example, what if I want to run a regulated 300V supply?
The heart of this design is the valve-based dac core and voltage reference and I think the focus should be on that in the first instance. Here are some points to summarise my thinking;
- Remove everything from the main PCB except for the DAC core and voltage reference, adding connectors for the required power supply connections and for data/clock inputs. This would significantly reduce the size and therefore the cost of the main PCB. Oh, and because of the way I am, I would move the voltage reference section so that it's valve is positioned equidistant from the dac core valves - i.e. it will be centred and all the valves will form a symmetrical plan form so that they'll look really neat (cool seems the wrong word in this context!) if exposed through the chassis!
- The power supply would be a separate, simple two layer PCB, or a veroboard, and the main CRCRC section could be replaced with a regulated supply if that's your poison. Yes, attention will be required to adher to the voltage referencing and there will be a few extra wires to connect up but the advantage is the flexibility but it should all be relatively simple if it isn't rushed.
- Place the 'input' section (data, clocks, mute etc. hanling) onto a separate, probably 2 layer, PCB and arrange everything so that it can plug-in directly under the core DAC board, (using the connectors I mentioned in the first bullet), keeping all the tracks as short as possible. This approach would optimise the layout but more importantly, different plug in boards could offer the option of a PCM solution. In my case, being prmarily interested in a DSD-only solution, my preference would be to incorporate the 'input section' onto an isolator/reclocker (like ppy's) with a beaglebone black plugging into that. I would also include the Mute/DSD-on parts, currently shown on the power supply schematic, onto this PCB. I think a PCB like this would cost less than 5USD each (assuming a minimum order of 5 two-layer PCBs). Another advantage of this approach is that the isolator/reclocker already has a high quality 5V supply to power the input section, further simplifying the current Valve DAC power supplies.
Ray
For a balanced version I would use something that also filters off any common-mode ripple, like C28 = C29 = C50 = C51 = 15 nF, inductors of 1.8 mH in the positive and negative lines and 5.1 nF // 390 ohm to ground on the other sides of the inductors. I haven't checked any of the other suppliers, but Farnell has 5.1 nF polystyrene through-hole and 5.1 nF NP0 SMD capacitors.
You can modify it in whatever way you like, of course, just keep in mind that crosstalk from the data lines to the reference or the clock limits the achievable signal to noise ratio. That's why I placed the data part of the input section on the bottom side and the clock part on the top. The clock5 and clockn5 are partly routed on the bottom because they are not that sensitive, it is the part from the clock input via an inverter and two EXOR gates or a flip-flop to the bottom E88CCs that matters.
By the way, the Amanero connector layout is a bit silly in this sense, having the clocks sandwiched between data lines while there are plenty of static outputs available that could have been used as shields. Well, at least they have used plenty of ground pins.
KiCAD has a very handy PCB calculator built in. It can calculate the required track distance for a given voltage, the required track widths for a given current and the required track widths for microstrips and other PCB transmission lines. The long data and clock lines on my PCB design are generally 50 ohm microstrip lines, except clock and clockn, those are 42 ohm lines that are split into two 84 ohm lines each in the middle between the DAC cores.
Thank you for the positive response and the tips Marcel, I was quite worried that I might upset you after you've given so much already.
Tomorrow I will start to learn my way around KiCad and the basic principles of it's design process.
I imagine it'll take me a while to get to the point of having a PCB design I can send to be fabricated but that's OK for me as I don't have an urgent need for a build.
Ray
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Don't worry. The reason why I posted the complete KiCAD database and not just the pdf schematics and the Gerber files is that I want people to be able to modify it if they want to. That's also the reason why the KiCAD database and the Verilog source code of the original version are on Jan Didden's website, and not just the pdf schematics, Gerbers and an MCS file for the FPGA module's flash memory. Of course the more you modify, the greater the chance that you will need to debug something, but if that's OK with you, it's OK with me.
If, in due course, you post your modified version before ordering the PCBs, I'll have a look to see if you made any mistakes that I already made in the original valve DAC, or if I see any other potential problems.
By the way, judging by the number of downloads of the Gerber files, besides you, there should be between 4 and 6 people interested in a DSD-only valve DAC. Then again, maybe they were just curious.
Thank you Marcel.
Yes, I'm very conscious that we don't have a working prototype of your DSD Valve DAC yet and having dipped into KiCad I'm beginning to realise how much I have to learn and I'm starting to get cold feet about making lots of changes! I know I'll be fine with basic CAD type editing quite quickly but it's the theorerical side that worries me - I'm certainly no electrical engineer and don't have a proper grasp of things like impedance matching etc. when laying out a PCB and it is clearly important on a complex project like this. My previous PCBs have all been very simple two layer affairs.
Anyway, I've also been checking out possible PCB fabricators as alternatives to EuroCircuits - I would prefer to buy in Europe but for the price on one board from them it looks as though I can get five from China and that might be sufficient to satisfy any GB interest. PCBWay say they can do a layer stack as follows;
- 35μm copper
- 180μm FR4 prepreg
- 180μm FR4 prepreg
- 1.2mm core with 35μm copper
- 180μm FR4 prepreg
- 180μm FR4 prepreg
- 35μm copper
but in order to provide a proper price quotation they need the layer stack specified in the gerber files. I did some quick googling and didn't find an answer on how to do it - any ideas? Perhaps it'll be better to post the question in the 'Design & Build' section.
Ray
I don't know either how to specify a custom layer stack in the Gerber files, I'll have to look into that.
By the way, have you seen their default stack-up for 2.4 mm-thick four-layer boards with 1.5 oz inner layer copper, the last of the four-layer stack-ups on PCBWay Multi-layer laminated structure - Custom PCB Prototype the Easy Way - PCBway ? It has the same prepreg thickness as Eurocircuits, although unfortunately they don't specify whether it is made up of two stacked thinner prepreg layers. It is substantially more expensive than the 1 oz inner copper version, but maybe less than a custom layer stack?
By the way, have you seen their default stack-up for 2.4 mm-thick four-layer boards with 1.5 oz inner layer copper, the last of the four-layer stack-ups on PCBWay Multi-layer laminated structure - Custom PCB Prototype the Easy Way - PCBway ? It has the same prepreg thickness as Eurocircuits, although unfortunately they don't specify whether it is made up of two stacked thinner prepreg layers. It is substantially more expensive than the 1 oz inner copper version, but maybe less than a custom layer stack?
Attachments
There is something about specifying a custom layer build-up in Gerber files on Wikipedia, though not much:
"The material stack up, components and finishes are typically provided in informal text files or drawings.[21] In 2018 Ucamco has published a specification for an extension of the Gerber format to cover this fabrication documentation.[22]"
See Gerber format - Wikipedia
Their reference [22] is Ucamco Releases Specification for Fabrication Documentation in Gerber
I'm pretty sure the version of KiCAD I have would't support any Gerber features that are as new as 2018.
"The material stack up, components and finishes are typically provided in informal text files or drawings.[21] In 2018 Ucamco has published a specification for an extension of the Gerber format to cover this fabrication documentation.[22]"
See Gerber format - Wikipedia
Their reference [22] is Ucamco Releases Specification for Fabrication Documentation in Gerber
I'm pretty sure the version of KiCAD I have would't support any Gerber features that are as new as 2018.
Thanks Marcel. I also found something about layer stacks in the documentation section of the KiCad website and I'll have a read shortly. However, I also found something on the PCBway site saying you just need to add notes to your order for custom layer stacks. I'll see if that works and if I can get a revised price to place an order.
Before then though...
I returned to work today after last week's break so had the opportunity to talk to my electronics friend, who also confirmed he is a KiCad convert. As a result of that and knowing help is close at hand, I feel a bit more confident about modifying your PCB. There is no great urgency with the project so I'm going to give myself 3-4 weeks to work on the modifications and if things don't work out I'll fall back to using your board layout.
Ray
Before then though...
I returned to work today after last week's break so had the opportunity to talk to my electronics friend, who also confirmed he is a KiCad convert. As a result of that and knowing help is close at hand, I feel a bit more confident about modifying your PCB. There is no great urgency with the project so I'm going to give myself 3-4 weeks to work on the modifications and if things don't work out I'll fall back to using your board layout.
Ray
The part of transmission line theory that is relevant for this project is basically this:
Electricity travels through a cable or a PCB trace at a finite speed, determined by the dielectric properties (and magnetic properties, if any) of the cable or the PCB dielectric layers. For traces on outer layers, it is determined by both the PCB dielectrics and the air.
When you suddenly apply a voltage step to a cable, the current that starts flowing right after the step is only determined by the step and the so-called characteristic impedance of the cable. The load that is connected to the other side of the cable initially has no impact at all, because in the beginning, the step hasn't reached the load yet. Of course the final current, long after the step took place, does depend on the load.
What happens is this: suppose the voltage step goes from 0 V to Vstep, the characteristic impedance is Z0 and the load is a resistor with value R. Immediately after the step, the signal travels through the cable or PCB trace to the load as a wave with voltage Vstep and current Vstep/Z0. If R = Z0, the wave is simply absorbed by the load and that is it.
If R is not equal to Z0, the voltage and current in the initial forward wave don't match the ratio of voltage to current that the resistor enforces. The wave is then partly absorbed and partly reflected. After bouncing back and forth a couple of times, the current eventually settles to Vstep/R.
In analogue audio equipment, one usually doesn't care about any of this as long as the cables are not longer than a few hundred metres. The settling is much faster than the rise time of audio waves, so you don't notice it anyway.
In a digital circuit with rise times of the order of a nanosecond, 15 cm to 20 cm of cable or PCB track have a delay of the same order as the rise time of the signal. One then has to ensure that waves that bounce back and forth don't mess up anything.
If you can accept one reflection, you can terminate a transmission line at the input rather than at the output. That is, drive it from an impedance equal to Z0 and load it with whatever impedance you want.
For example, assume a source stepping from 0 to Vstep, a series resistor R with R = Z0 between source and cable, and an open cable end. The initial wave travelling through the cable will then have a voltage Vstep*Z0/(Z0+R) = Vstep/2 and a current Vstep/(R+Z0) = Vstep/(2*Z0). When it reaches the open end, it will be reflected completely with such a phase relation that the voltage at the open end doubles. That is, it becomes Vstep. After travelling back to the input, the input current steps down to 0 and everything is settled.
So all in all, considering the speed of the digital circuitry in the DSD-only variant of the valve DAC and the size of the PCB, one has to be careful with long PCB traces driven by relatively fast logic. The mute and DSDon traces are fairly long, but when those signals bounce up and down a couple of times, no-one will notice. The ones that really matter are the clock and data signals that go from the input circuitry to the valves: critical signals, fast logic, long traces. Hence, the only lines designed as input-terminated transmission lines are the left and right data lines, clock, clockn, clock5 and clockn5.
A trace above a ground plane is a so-called microstrip transmission line. The KiCAD PCB calculator can readily calculate its characteristic impedance. To terminate it, one then simply adds a resistor at the input side equal to the difference between the characteristic impedance of the line and the output impedance of the logic gate that drives the line.
Like I wrote, I used 50 ohm lines for the clock5/clockn5 and data lines (simply changed the trace width to the value that gives 50 ohm according to the KiCAD calculator). This is a compromise: I wanted a value that's high compared to the output impedance of the driving logic, so most of the input termination would be set by a well-defined resistor rather than the very inaccurate impedance of the logic gate. On the other hand, I wanted to keep the impedance fairly low so it could easily drive the lumped input capacitances of the flip-flop circuits next to the E88CCs.
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FWIW, at work, we specify all the stackup type information in a PWB drawing. The drawing and gerbers are provided to the board house when we order boards.
If we have controlled impedance traces, that should also be in the PWB drawing.
Notes to the PWB vendor will work fine for a diy project.
We use controlled impedance quite a bit. Impedance will depend on the dielectric of the actual FR4 type used, and thickness of the FR4 between the layers involved. The board house can tweak the pwb design to get 50 ohms, as long as you tell him you have 50 ohm traces. Unless you don't care if its not exactly 50 ohms. In most of my applications, I need an exact impedance match and so we work with the board house to get it.
Randy
If we have controlled impedance traces, that should also be in the PWB drawing.
Notes to the PWB vendor will work fine for a diy project.
We use controlled impedance quite a bit. Impedance will depend on the dielectric of the actual FR4 type used, and thickness of the FR4 between the layers involved. The board house can tweak the pwb design to get 50 ohms, as long as you tell him you have 50 ohm traces. Unless you don't care if its not exactly 50 ohms. In most of my applications, I need an exact impedance match and so we work with the board house to get it.
Randy
Hi Marcel. I got a price for boards with the custom layer stack from PCBway - 350USD for five boards (plus shipping if I'm reading things correctly so I guess nearer to 400USD).
In the absence of anyone else being interested (I've had no response to my previous post asking for expressions of interest), should I choose to go with your board I will probably have to go with EuroCircuits.
In the absence of anyone else being interested (I've had no response to my previous post asking for expressions of interest), should I choose to go with your board I will probably have to go with EuroCircuits.