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Valve DAC from Linear Audio volume 13
Valve DAC from Linear Audio volume 13
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Old 10th January 2021, 09:06 PM   #1261
U130421 is offline U130421  Antarctica
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I want to know how many cycles it needs to reach steady state and decays back to off at 20khz , 44.1khz, no recording filter.
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Old 10th January 2021, 10:20 PM   #1262
MarcelvdG is online now MarcelvdG  Netherlands
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Location: Haarlem, the Netherlands
This is the calculated response of my first interpolation filter in the steep mode to your burst, this first filter should be dominant. The burst starts at t = 0 s, the horizontal axis is in seconds and the vertical axis in arbitrary units. I hope this helps.

For completeness' sake, the second plot shows the same for the apodizing filter. It shows that at a sample rate as low as 44.1 kHz, 20 kHz is in the apodizing filter's stopband and is hence suppressed.
Attached Images
File Type: png burst.png (57.5 KB, 286 views)
File Type: png burst_W.png (39.7 KB, 161 views)

Last edited by MarcelvdG; 10th January 2021 at 10:30 PM.
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Old 10th January 2021, 10:54 PM   #1263
acg is offline acg  Australia
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Marcel, have you checked the filters resulting from your interpolation method in some sort of sim? I have, and it is possible that I have misinterpreted something, but my results are not good. If we use the following start point for the calculations (just like the existing filter in the schematics):

Source load 11,200ohm
Termination Load 800ohm
Fc = 82,000Hz
6th order Linear Phase Low Pass 0.05deg phase error

I get interpolated constants as follows:

C1 = 0.7104
L1 = 3.3881
C2 = 0.4364
L2 = 4.9412
C3 = 0.3060
L3 = 8.6052

See the attachment for my sims: top is using the INF constants; bottom is using the interpolated constants.
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Old 11th January 2021, 07:04 AM   #1264
MarcelvdG is online now MarcelvdG  Netherlands
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Something must have gone wrong with the interpolation. It's interpolation between figures 2C and 2D of the pdf file, so the interpolated values must end up somewhere between the values of figures 2C and 2D. By the way, the source impedance is about 5600 ohm single-ended or 11.2 kohm differential.
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Old 11th January 2021, 08:00 AM   #1265
U130421 is offline U130421  Antarctica
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Thank you very much, very instructive.
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Old 11th January 2021, 08:44 AM   #1266
acg is offline acg  Australia
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Yes, it certainly looks that way...and I missed the differential source impedance. I'll study your paper again to figure out what needs changing.
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Old 11th January 2021, 08:47 AM   #1267
acg is offline acg  Australia
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Marcel, the DC blocking caps are only there to keep high DC out of the transformer primary, correct? If the transformer could handle those voltages, including the 300Vdc single failure voltage we talked about earlier, then do those cap become redundant and are not required in the build?
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Old 11th January 2021, 10:32 AM   #1268
MarcelvdG is online now MarcelvdG  Netherlands
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No, you also need them to ensure that the transformer core isn't driven into saturation during start-up or power-down and to be able to trim the anode voltages for minimum idle channel noise. You can use a much lower working voltage, though: 100 V is enough when the transformer is sufficiently insulated.
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Old 11th January 2021, 11:41 AM   #1269
thuanth43 is offline thuanth43  Singapore
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acg,

Please share your OPTs’ specs when you finalize them. I don’t plan to use OPTs since my system chain is all balanced but entertaining the idea of adding ‘color’ to the DAC with the transformers.
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Old 11th January 2021, 07:44 PM   #1270
acg is offline acg  Australia
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Will do @thuanth43. By the way, I've ended up ordering some ValveDac pcbs and am happy to swap one set for your DSD only boards if you still wish to...may even build both versions myself.
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