Hi.
I've been playing with wm8805 chip lately and i really love the sound of that chip but i cant get it to lock on anything higher than 16/44.
If i play higher res.like 24/96 Files the sound gets hiccups and if i play 24/192 than i get no sound and lots of crackles.
Im using spdif input with cap in series and 75ohm to ground. ...the chip is connected to wm8741 dac (i2s).
The chip is setup in hardware mode and it suppose to support all data up to 192.
...i cant figure out what im doing wrong.
But it sound amazing with 16/44 files.
Has anyone experience similar problem with wm8805?, if you have any suggestions please let me know.
K.
I've been playing with wm8805 chip lately and i really love the sound of that chip but i cant get it to lock on anything higher than 16/44.
If i play higher res.like 24/96 Files the sound gets hiccups and if i play 24/192 than i get no sound and lots of crackles.
Im using spdif input with cap in series and 75ohm to ground. ...the chip is connected to wm8741 dac (i2s).
The chip is setup in hardware mode and it suppose to support all data up to 192.
...i cant figure out what im doing wrong.
But it sound amazing with 16/44 files.
Has anyone experience similar problem with wm8805?, if you have any suggestions please let me know.
K.
I've never managed to get a WM8805 to accept anything above 96kHz in Hardware Mode.
If it is possible I'd be interested to know how to do this. I have a vague feeling there is something in the Datasheet that says it isn't capable in H/D Mode but having just trawled through it I can't find it !!
I have though no trouble in getting it to work with 96kHz material.
What is your SPDIF source? Optical or Coaxial?
I had trouble with one particular Optical Receiver and ended up doing away with the 75 OHM Resistor across the 8805's Digi I/P.
P.
If it is possible I'd be interested to know how to do this. I have a vague feeling there is something in the Datasheet that says it isn't capable in H/D Mode but having just trawled through it I can't find it !!
I have though no trouble in getting it to work with 96kHz material.
What is your SPDIF source? Optical or Coaxial?
I had trouble with one particular Optical Receiver and ended up doing away with the 75 OHM Resistor across the 8805's Digi I/P.
P.
Hi
Percival007 ...and many thanx for your reply.
...my spdif source is coaxial and i do everything as described in data sheet and still cant get it locked on 96 properly.,...the sound is there but it crackles.
...i use 12mhz oscillator with dedicated 5v psu.
Pins that i keep high are: 4,8,10,11
Pins kept low : 5,7
Spdif input pin 3
....any suggestions?
Best and many thanx.
Percival007 ...and many thanx for your reply.
...my spdif source is coaxial and i do everything as described in data sheet and still cant get it locked on 96 properly.,...the sound is there but it crackles.
...i use 12mhz oscillator with dedicated 5v psu.
Pins that i keep high are: 4,8,10,11
Pins kept low : 5,7
Spdif input pin 3
....any suggestions?
Best and many thanx.
Do you mean that the Oscillator has it's own dedicated 5V Supply? If you mean you are supplying the 8805 with 5V this may be a problem. It may be better run from a 3.3V Supply. +5 is an absolute Max according to the datasheet.
What are you doing with Pin 9?
Pin 10 is a Reset and needs a Cap to Ground too.
What DAC are you feeding from the 8805?
I feed a TDA1541A and I configure it like so.......
Pins 5,8 and 9 = Low
Pin 4 = High
Cheers,
P.
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Thats right, i use 3.3v to power dvdd and pvdd and 5v is just to power 4 pin crystal
Thats the power that crystal needs to work.
Perhaps you are using 12mhz 2 pin crystal connected between pins14/15.
...i keep pin 4 high obviously, ...pin 5 kept low,...pin 9 i didn't even connect so im assuming that is low and as far as i understand pin 9 is just Unlock flag in HW mode.
Pin 8 i keep high opposed to you.
Keeping pin 8 high means i2s 24bit....and that's what i want.
...you keep that pin low and that means you selectedi2s 16bit or 24bit left justified with flags.
...im not using any flags.
...i will try to change to your settings but i dont think that will change anything.
...im using my wm8805 with wm8741 dac chip.
I2s connection with 33ohm resistors.
..and pin 10 reset has 10uf to ground.
Thats the power that crystal needs to work.
Perhaps you are using 12mhz 2 pin crystal connected between pins14/15.
...i keep pin 4 high obviously, ...pin 5 kept low,...pin 9 i didn't even connect so im assuming that is low and as far as i understand pin 9 is just Unlock flag in HW mode.
Pin 8 i keep high opposed to you.
Keeping pin 8 high means i2s 24bit....and that's what i want.
...you keep that pin low and that means you selectedi2s 16bit or 24bit left justified with flags.
...im not using any flags.
...i will try to change to your settings but i dont think that will change anything.
...im using my wm8805 with wm8741 dac chip.
I2s connection with 33ohm resistors.
..and pin 10 reset has 10uf to ground.
Pin 9 made no difference. I did have it low/high...and back to floating.
Changing oscillator from 4 pin to 2 pin and placing it between pins 14/15 with two 15pf caps to ground ....finally made 24/96 possible! .
So partially problem solved! .
But 16/44 and 24/96 are the only formats the chip locks on at the moment. ..other formats still crackling
Any idea?.
many thanks for your valuable suggestions
K.
Changing oscillator from 4 pin to 2 pin and placing it between pins 14/15 with two 15pf caps to ground ....finally made 24/96 possible! .
So partially problem solved! .
But 16/44 and 24/96 are the only formats the chip locks on at the moment. ..other formats still crackling
Any idea?.
many thanks for your valuable suggestions
K.
That's great news.
Can you get 48kHz or 88.2kHz to work?
Anything higher than 96 kHz I really don't think is possible. I'm not 100% certain I really understand it but on Page 28 of the Datasheet it says.........
''.............The PLL register settings are configured by default to allow 32/44.1/48/88.2/96kHz (modes 2/3/4) sample rate S/PDIF receiver operation using a 12MHz crystal clock. The PLL register settings must be updated if:
• Any crystal clock frequency other than 12MHz is used.
OR
• A S/PDIF stream with 192kHz sample rate (mode 1) is detected................''
I don't think you can change those 'Modes' other than in Software Mode. If you find out how, I'd like to know also.
Cheers,
P.
Can you get 48kHz or 88.2kHz to work?
Anything higher than 96 kHz I really don't think is possible. I'm not 100% certain I really understand it but on Page 28 of the Datasheet it says.........
''.............The PLL register settings are configured by default to allow 32/44.1/48/88.2/96kHz (modes 2/3/4) sample rate S/PDIF receiver operation using a 12MHz crystal clock. The PLL register settings must be updated if:
• Any crystal clock frequency other than 12MHz is used.
OR
• A S/PDIF stream with 192kHz sample rate (mode 1) is detected................''
I don't think you can change those 'Modes' other than in Software Mode. If you find out how, I'd like to know also.
Cheers,
P.
WM8805 needs a bit of "help" if wished to receive streams of sample rate higher than 96K, namely 176.4K and 192K.
This is because in order to lock onto a 192K sample rate stream, WM8805's internal PLL must start to operate at a different set of division parameters (PLL_K and PLL_N) than a common set of parameters that's good for all other sample rates, yet ironically, WM8805 is unable to tell a 192K incoming stream from a 176.4K one, and therefore, unable to decide by itself when to switch to the correct set of PLL parameters.
The data sheet has no info about how the PLL parameter switching are handled in hardware mode. I would then hazard a guess that it is not handled at all, hence the chip would stick with one set of parameters, which is good for up to 176.4K, and ditch the support to 192K.
In my Whazon Spdif switch project (software mode operation), an Arduino Nano micro-controller helps by clocking the recovered LRCK cycle period and then accordingly, loading the control registers with proper set of PLL parameters. This seems to be the only way of getting WM8805 to reliably operate on 192K and all other supported sample rates.
This is because in order to lock onto a 192K sample rate stream, WM8805's internal PLL must start to operate at a different set of division parameters (PLL_K and PLL_N) than a common set of parameters that's good for all other sample rates, yet ironically, WM8805 is unable to tell a 192K incoming stream from a 176.4K one, and therefore, unable to decide by itself when to switch to the correct set of PLL parameters.
The data sheet has no info about how the PLL parameter switching are handled in hardware mode. I would then hazard a guess that it is not handled at all, hence the chip would stick with one set of parameters, which is good for up to 176.4K, and ditch the support to 192K.
In my Whazon Spdif switch project (software mode operation), an Arduino Nano micro-controller helps by clocking the recovered LRCK cycle period and then accordingly, loading the control registers with proper set of PLL parameters. This seems to be the only way of getting WM8805 to reliably operate on 192K and all other supported sample rates.
If used with 5V it will put out pulses of 5V which simply is too much. If going this way you should use a 3.3V version of the XO. This "5V XO" error is often seen on cheap boards.
Thank You for your comment, i have figured that out already and bought 3.3 crystal.
...you are very welcome to share your knowledge about wm8805. ;-).
I would if I could help you. Not that much experience with the WM8805, well not much experience with issues/problems and/or software mode. Material I have is rarely higher than 24/96. I used the WM8804 a lot and no issues with that one either. IMO both are excellent SPDIF receivers compared to other chips.
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Hi,
There is no way to get the wm8805 + wm8741 combi properly working from 44k - 192k in hardware mode...
Software mode is needed as the MCLK for higher sample rates needs to be 128fs and for low sample rates needs to be 256fs or 512fs.
Moreover, the 8741 internal filter needs to set properly to low/mid/high. For test it can be set to 'high' for all sample rates, but the digital filter will not work properly and lets trough a lot of ultra sonic noise. Using >48k on the 'low' filter setting will give you noise only.
When used properly, this combi sounds wonderful, even compared to modern standards.
Rob / Cyenne Audio
There is no way to get the wm8805 + wm8741 combi properly working from 44k - 192k in hardware mode...
Software mode is needed as the MCLK for higher sample rates needs to be 128fs and for low sample rates needs to be 256fs or 512fs.
Moreover, the 8741 internal filter needs to set properly to low/mid/high. For test it can be set to 'high' for all sample rates, but the digital filter will not work properly and lets trough a lot of ultra sonic noise. Using >48k on the 'low' filter setting will give you noise only.
When used properly, this combi sounds wonderful, even compared to modern standards.
Rob / Cyenne Audio
Did you happen to have the terminating resistor placed away from the WM8805? did you have the PCB traces sized for correct impedance? Just trying to rule out something obvious without seeing your layout. Attached is how I placed the 75-R terminating resistors around the S/pdif input pins that I don't think could be bettered much on a 2-layer layout. Rs and Cs in this layout are 0805 size.
Attachments
Hi. Got it working on all formats up to 24/96 ! In HW mode so thats great and probably all i need.
I hardly ever listen to anything higher than that.
I will still try to get the guy locking on 24/192 in HW mode and let you all know if i managed to do it.
Thank you all for your helpful comments.
Best
K.
wm8805 problem
Hi kropka235,
I know it is a old thread but I`m having the same issues you had.
Could you please let me know how you managed to get all formats up to 96/24 working properly for the wm8805 in hardware mode?
I´m refering to pins that should be low and pins that should be high on the wm8805.
I´m using a PCM1754 DAC and 12Mhz clock cristal.
In the moment it only works at 44.1/16 bits and tried different pin configurations.
Thanks,
Hi kropka235,
I know it is a old thread but I`m having the same issues you had.
Could you please let me know how you managed to get all formats up to 96/24 working properly for the wm8805 in hardware mode?
I´m refering to pins that should be low and pins that should be high on the wm8805.
I´m using a PCM1754 DAC and 12Mhz clock cristal.
In the moment it only works at 44.1/16 bits and tried different pin configurations.
Thanks,
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