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|23rd December 2016, 01:29 AM||#1|
Join Date: Oct 2016
Merry Christmas to everyone! All the best to you and yours
Iím exploring TDA1541A mods. In particular re-clocking using a low jitter high quality 3-rd party 11.2896 MHz clock.
I read this quite useful article (https://www.google.ca/url?sa=t&rct=j...42059868,d.amc) - pdf file.
Help with two questions would be appreciated:
1. Has anyone tried implementing the solution from the article above with regular TDA1541A? In particular, Iím interested in comments on the following:
1. Cut the link between pin 2 & 4
2. Provide x1 clock to pin 4
*this could also be tied to GND as an option
*x1 clock may only work with non A, S1 and S2 chips
3. Provide /2 to pin 2
*May only work with non A, S1 and S2
2. I would appreciate an advice for using one 74HC74 as frequency divider and also the inverter to be used for DEM re-clock. My sketch is on the attached image. Can somebody confirm that itís done right or suggest another correct/better schematics?
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