Well, some time ago, I was looking at the XMOS programmer forum(s) about higher sample rates than 192kHz. The limit is the maximal MIPS power of each CPU. Means this is the limit.
Currently I do channel bundling to get 2x,4x,8x speed of the base sample rate as 192kHz maximum using a miniDSP USBStreamer
Even AKM would be interested to have 768kHz I/O
Hp
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HpW, please explain in more detail about channel bundling. I do happen to own a usbstreamer as well as a few other usb interface boards with the newest one being the DIYINHK Multichannel.
XMOS Multichannel high-quality USB to/from I2S/DSD SPDIF PCB - DIYINHK
I'm rather new to the diy-thing, a couple of years into it I would say. I just need to have some of you good people help me figure out how to get 2ch input of i2s receive at 768k and 2ch output of i2s transmit at 768k on the usb device, not the multiple channels. Not necessary for my setup. Just trying to learn!
XMOS Multichannel high-quality USB to/from I2S/DSD SPDIF PCB - DIYINHK
I'm rather new to the diy-thing, a couple of years into it I would say. I just need to have some of you good people help me figure out how to get 2ch input of i2s receive at 768k and 2ch output of i2s transmit at 768k on the usb device, not the multiple channels. Not necessary for my setup. Just trying to learn!
Well, the USBStreamer has in total 10 Input & 10 Output channels and only 24 bits/channel. The maximum samplerate is given at 192kHz (The driver V1.65 is outdated too).
As in the old days to increase 48kHz SPDIF to 96kHz, a dual channel system was used as AP (Audio Precision). I supported the same thing on WDM & Windows XP to get the same double samplerate.
Means 2x speed:
For sample 1 : Ch1 (left) = Data [0], Ch2 (right) = Data [1]
For sample 2 : Ch1 (left) = Data [2], Ch2 (right) = Data [3]
...
means using multiple channels we get a multiple of the samplerate. Also means your input & output API & HW is able to deal with.
On HW:
To get the required 768kHz stereo samplerate & channels, a shift logic is required to convert those individual channels to the 4x speed using. May FPGA may used or simple logic.
On Application:
The API has to deal with this channel bundling in a revert manner.
My test was done using 4 jumpers on the USBStreamer I2S I/O to get the 768kHz stereo spectrum. Also I support a mono 8x speed
Getting a higher channel count at 768kHz & stereo, a different HW solution (XMOS & USBStreamer) is required. May using the MADI interface would be the right direction.
Hp
Hi errmoo, i get the xtag3 this week and hoppe the Xmos multichannel arrive until end this week from hong kong. I already get a backup of the ordered xmos firmware and will begin to modify first the firmware to get the Native DSD 256 runing on my AK4490 DAC, with a configured 6 in and 2 out (6 in for covering S/pdif, coax and usb input selection) why first the NATIVE DSD256 :
The current oscillator on the board could cover the MCLK and SCLK but for PCM output 32bit at 768khz seems we have to change the oscillator on board or use an external clock to be able to divise the MCLOCK.
Please take a look on XMOS document related too (Reference: AN00103)
Extract:
"In many cases, the high PCM sample rate (768KHz) required to carry DoP DSD256 will not actually be supported by the hardware. For example it can not supported using a 22.5792MHz MCLK"
Second Phase:
I already buy two oscillator for updating the board , i have then to modify all divisor setting in xmos firmware to be able to use this new two audio oscillator to get the PCM 768khz, DoP DSD256 and DSD256 from the AK4490 .
Third Phase waiting on sample for the AK4497 to build a new board with integration of the XMOS-200 to cover also then the DSD512 on this new ultra performance DAC from AKM.
Regards
The current oscillator on the board could cover the MCLK and SCLK but for PCM output 32bit at 768khz seems we have to change the oscillator on board or use an external clock to be able to divise the MCLOCK.
Please take a look on XMOS document related too (Reference: AN00103)
Extract:
"In many cases, the high PCM sample rate (768KHz) required to carry DoP DSD256 will not actually be supported by the hardware. For example it can not supported using a 22.5792MHz MCLK"
Second Phase:
I already buy two oscillator for updating the board , i have then to modify all divisor setting in xmos firmware to be able to use this new two audio oscillator to get the PCM 768khz, DoP DSD256 and DSD256 from the AK4490 .
Third Phase waiting on sample for the AK4497 to build a new board with integration of the XMOS-200 to cover also then the DSD512 on this new ultra performance DAC from AKM.
Regards
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