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freeDSP V2.0 (ADAU1452) developement thread
freeDSP V2.0 (ADAU1452) developement thread
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Old 13th October 2015, 06:25 PM   #41
Pitrsek is offline Pitrsek  Czech Republic
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Default Boards are on the way

Boards have been shipped today. A little late, since I ordered on 30.9 .
Hopefully the shipping will be a little bit faster
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Last edited by Pitrsek; 13th October 2015 at 06:33 PM. Reason: typo
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Old 13th October 2015, 10:41 PM   #42
drojf is offline drojf  Australia
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Just realized it was a chinese holiday right around when you ordered your PCB, that would explain why :S

BLOG | Holiday for Mid-Autumn Fetival and National Day Updated
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Old 15th October 2015, 08:38 PM   #43
doctormord is offline doctormord  Germany
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Quote:
Originally Posted by drojf View Post
I've ordered from Elecrow and they are very fast - the times they state (4-7 dats) are more or less correct, and they will take a picture of your pcb before they send it out (as 'proof' that they're not faking shipping time as production time). The longest waiting time is probably for the shipping, depending on what shipping option you chose, and where you live.
You may give pcbway.com a try. With DHL-Express it tooked 4 days all over. (manufacturing+shipping)
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Old 20th October 2015, 11:07 AM   #44
maxidcx is offline maxidcx  France
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Hi Pitrsek
nice to see you finalized a board. great stuff.
I m afficionados of 1452 as it is amaizingly powerfull.
I have a bit of a project in mind too, with this ADAU and dual pcm1792.

anyway, if you want to be safe, I d recomend to find a way to not consider ADAU as a master clock... the jitter even with a good supply migth not be enough for the hifi, from some feedback provided on another forum in europe.
Also be carreful, all the nice ASRC inside the adau are great but they just transfer jitter into thd. My personnal approach is to use an SI570 for the MCLK and consider the adau as slave, with its cycle synchronised on LRCLK. Now you need a uP to synchronize the frequency of the SI570 with the incoming rate and by reading the ASRC ratio you can reasonbly do that and then organize to have a ration of 1 or 2 or 4. Enjoy the next steps, I ll stay tuned on this thread.

BTW how will you solder all these tiny pins of the adau ??? oven ?
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Old 22nd October 2015, 06:59 AM   #45
maxidcx is offline maxidcx  France
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Default ADAU ASRC Jitter

well reading my above statement about jitter and ASRC in the ADUA1452, I should give more fact. Here is a plot I did early 2015 by connecting the Minidsp xmos usb streamer with the ADAU1452 on the AD Evaluation board.
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the plot shows a 1khz tone going trough 2 internal asrc (on input and output), with the ADAU runing at 96khz cycle with its own onboard clock.
the Minidsp streamer works assynchronously but is know for its very bad jitter as the 24/22mhz clock is provided from a PLL chip (see a topic on this here:
Master clock and isolator for the MiniDSP USBStreamer

So question is can you here the -140db effect of the dual asrc jitter, probably no. On the other end, REW is computing a THD+N of 0.009% and this 10 time more than a 0.001% which you can get out of a decent DAC implementation...

So another approach is to drive your DACs MCLK with a stellar clock, like the one describe on Herbert site here:
https://www.by-rutgers.nl/rutgerS-Clock.html
and use this clock as the XTALIN for the ADAU too. Then the ADAU can be master I2S to the DAC but you may need to consider reclocking of the I2S line if you dac is not already imune to the is2 jitter (seems the PCM1792 has its own reclocking ) as the ADAU will provide more than 150ps rms (and some we can here jitter effect down to 1ps ish)

this way you avoid the burden of the clock sync between source and DAC, and trust the ADAU ASRC to make the conversion in a reasonably good way.
Also it s quite good to use ASRC at the output of ADAU, for their good band filter with sharp rolloff instead of the DAC internal digital filter (with a ratio of 1:1 or 1:2) (cant find the diyaudio post about that)
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Last edited by maxidcx; 22nd October 2015 at 07:28 AM.
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Old 22nd October 2015, 10:59 AM   #46
Pitrsek is offline Pitrsek  Czech Republic
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Hi maxidcx,
the idea indeed is to use ADAU as master clock for all - signal source(RPi in this case), and dacs. I've selected NDK NZ2520SD as a clock source, its connected to low jitter clock driver. You can connect differet clocks via u.fl - there's a multiplex on clk driver input. I have to reed up a bit about jitter measurements, so i can make my own. Thx for your comments and measurement.

Boards still haven't arrived.
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Old 2nd November 2015, 10:29 AM   #47
Pitrsek is offline Pitrsek  Czech Republic
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1 day away from 25days shipping limit .
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Old 2nd November 2015, 12:55 PM   #48
doctormord is offline doctormord  Germany
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I wonder who will hear the difference between 0.009% and 0.001% in addition to -140dB of jitter effects.
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Old 4th November 2015, 09:19 PM   #49
kouiky is offline kouiky  United States
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Jitter at -140dB, zero probability of audibility.
Harmonic distortion at 0.0000%, zero probability of audibility.
Noise at 0.009%, -81dB, conditional with some probability.

If the noise is present on a continuous basis and the device is gain stuctured such that master attenuation is implemented prior to the device, the noise will be amplifed by the power amplifier(s) gain. Note that 0.009% (-81dB) noise is > 10dB greater noise magnitude than a mediocre DAC or CD player. A daughter board for the master volume attenuation - via optocouplers inline with output opamps' inputs -could be a good workaround. The microcontroller regulating the optos could be operated from a single potentiometer or remote data pot.
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Old 15th November 2015, 01:29 PM   #50
golfgtig60 is offline golfgtig60  Italy
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hi..are there news on this project?..i'm very interested and now i'm waiting for you beautyful project
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