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The Well Tempered Master Clock - Building a low phase noise/jitter crystal oscillator
The Well Tempered Master Clock - Building a low phase noise/jitter crystal oscillator
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Old 25th March 2018, 06:52 PM   #1661
1audio is offline 1audio  United States
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The Well Tempered Master Clock - Building a low phase noise/jitter crystal oscillator
I have used them for clock distribution. There are some nice little rf transformers that work well.
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Old 13th April 2018, 06:17 AM   #1662
rsneha is offline rsneha
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BTW.: is there anybody who can tell how to implement an English spell checker on this foruM?[/QUOTE]

Hello Guys, You want to enhance English Language and find your error in grammar and spelling without troubles Just visit it : Grammar Checker : Spell Check | Grammar Check
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Old 27th April 2018, 04:35 PM   #1663
shendrik is offline shendrik  Russian Federation
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Hi Andrea

I built a Driscoll generator with an SC-cut oscillator. The nominal values ​​of resistors, capacitors and inductances correspond to the latest version of the table on page 16 of the manual. I tried using transistor MMBT5179 and NE85633.
In all cases, a generator with an oscillator of 45.158 MHz operates at a frequency of 49.158 MHz.
Changing the value of the capacitor C3 in either direction does not change anything.
Please tell me what I need to do to get the correct frequency.
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Old 27th April 2018, 10:17 PM   #1664
andrea_mori is offline andrea_mori  Italy
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The Well Tempered Master Clock - Building a low phase noise/jitter crystal oscillator
Quote:
Originally Posted by shendrik View Post
Hi Andrea

I built a Driscoll generator with an SC-cut oscillator. The nominal values ​​of resistors, capacitors and inductances correspond to the latest version of the table on page 16 of the manual. I tried using transistor MMBT5179 and NE85633.
In all cases, a generator with an oscillator of 45.158 MHz operates at a frequency of 49.158 MHz.
Changing the value of the capacitor C3 in either direction does not change anything.
Please tell me what I need to do to get the correct frequency.
Hi,

it seems that your Crystal starts at unwanted B-mode, so you need some fine tuning to get it works at the right frequency.

Firstly keep the MMBT5179 in place.

First option with fixed components: you could install C3=5.6pF C2=2.2pF R1=1K R2=330R and check the frequency.

Second option: you could replace C1 and C3 with trimmer capacitors (2-15pF) and then you have to tune these to see if the oscillator starts correctly. Finally you can measure the capacitance of the trimmer capacitors and replace them with fixed type.

Third option: keep all original component values and place an inductor with a value around 1 or 1.2 uH in series between C2 and ground.

Anyway take care to set R11 to get half VCC at Q1 collector.
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Old 12th May 2018, 03:23 PM   #1665
miksi is offline miksi  Serbia
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Common mode choke B82799S513N1 designated L3 on D&D board is obsolete. Can you recommend suitable replacement part?

Last edited by miksi; 12th May 2018 at 03:28 PM.
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Old 12th May 2018, 04:49 PM   #1666
andrea_mori is offline andrea_mori  Italy
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The Well Tempered Master Clock - Building a low phase noise/jitter crystal oscillator
Quote:
Originally Posted by miksi View Post
Common mode choke B82799S513N1 designated L3 on D&D board is obsolete. Can you recommend suitable replacement part?
You can use this:
B82789C0513N002 EPCOS / TDK | Mouser Italia
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Old 20th May 2018, 02:31 PM   #1667
gentlevoice is offline gentlevoice  Denmark
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The Well Tempered Master Clock - Building a low phase noise/jitter crystal oscillator
Hi all,

Well, summer is approaching yet I was thinking that I'd like to share some results I got the other day measuring a small inverter test PCB likely to be used for the output of the TWTMC.

As it is my DC-Receiver (courtesy Herbert Rutgers) hopefully soon will be ready to use and to this end I have made some small test PCBs: A clock divider PCB (a FF) and an inverter PCB where different options can be tried out.

In a first round I tried the inverter PCB and among other things paralleling or not paralleling the outputs (74HCU04). I.e. a single inverter or 3 paralleled inverters. I also tried to insert a resistor (40 ohms) between the squarer inverter and the output inverters.

The latter did not really cause much change in the measurements, whereas paralleling/not paralleling the outputs caused an appr. 100% difference in the noise amplitude on the VDD pin of the inverter. Paralleling the outputs caused this ~ 100 increase in the noise amplitude.

Also, measuring the individual outputs of the inverters, what I assume is a slight difference in trigger time between the individual inverters showed up clearly on the oscilloscope. This was not the case when only one inverter was used.

One remark here: I connected the 33 ohm resistors on the output of the inverters so that the paralleling took place after these resistors and not before. Thus each inverter did not "see" another two inverters' output directly but through 2 * 33 ohms. Paralleled it would give 11 ohms output impedance plus another 33 ohms connected in series with the three paralleled 33 ohms resistors (I hope this may be visualized ;-)).

Unfortunately, I didn't save any of the key measurements - so nothing to show - but thought that I'd share this anyway.

Cheers,

Jesper
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Old 20th May 2018, 04:20 PM   #1668
miklos is offline miklos  Hungary
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Thanks for that Jesper, good to know.
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Old 20th May 2018, 04:31 PM   #1669
1audio is offline 1audio  United States
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The Well Tempered Master Clock - Building a low phase noise/jitter crystal oscillator
How much propagation difference did you measure on the inverter? That is usually a very small number.

There are techniques for measuring the phase noise contribution of stages in a system. They can be very sensitive and are simpler than measuring a source. This may be helpful: 74AC04 Residual Phase Noise Measurements
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Old 21st May 2018, 04:01 AM   #1670
gentlevoice is offline gentlevoice  Denmark
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The Well Tempered Master Clock - Building a low phase noise/jitter crystal oscillator
@1audio:

Quote:
How much propagation difference did you measure on the inverter? That is usually a very small number.
I didn't as such measure the propagation difference other than noticing that using three or one inverter (input pins & output resistors lifted on the unused inverters) led to both more noise (glitch I believe) on the output of the inverter(s) and also on the PSU pin.

FYI my oscilloscope has a 200 MHz bandwidth.

Quote:
There are techniques for measuring the phase noise contribution of stages in a system.
I haven't yet come to that as the DC-Receiver is not yet ready but hopefully soon ...

Cheers,

Jesper
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