"using its own buffer x 3 and triple the current, that should work better than a 627 with 100% feedback."
Using three 844 buffers stacked was still not as good as 1 OPA627, maybe 1 844 buffer could be with feedback.
"I can't say that all the AD844's purchased are legitimate, only that they behave as reasonably expected."
I was conversing with Barry Gilbert the designer of the AD844, he was very chuffed to see what we ere doing with it without feedback and stacked for I/V stage. He was going to send me the proper schematic of everything inside it if he could find it, but he never did.
Cheers George
Using three 844 buffers stacked was still not as good as 1 OPA627, maybe 1 844 buffer could be with feedback.
"I can't say that all the AD844's purchased are legitimate, only that they behave as reasonably expected."
I was conversing with Barry Gilbert the designer of the AD844, he was very chuffed to see what we ere doing with it without feedback and stacked for I/V stage. He was going to send me the proper schematic of everything inside it if he could find it, but he never did.
Cheers George
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Yesterday finally received some more pieces of AD844 from China ebay, which I ordered after deciding to stack them and not knowing they sell fakes. These are with white printing and exhibit the 10k resistance between pins 7-1,8. Tried 2 pcs in circuit and they indeed work. In the batch there was 1 pc with gold printing, which is fake (different opamp).
I think my iv stage for TDA1541 is now final. I listened for some time to 3x AD844 in parallel with output from 1 buffer only (better than 3 buffers). The sound was acceptable, "safe" but frankly not very exciting. But I had on the board empty DIL sockets + regulators (+13.6V, -13.6V) after I discarded the BUF03. So I inserted simple emitter follower from BC109B and 10k emiter resistor into the socket. And this redefined the sound! Much better dynamic contrast, size of the scene etc. etc.
Paralleling the AD844's would have the effect of increasing the linearity of the input stage by reducing the currents from the DAC into 3rd's. It should be noted that inverting terminal current is limited to 5mA continuous / 10mA transient. By paralleling the devices, 2/3 of the 2mA full scale DAC current is being shunted, leaving 0.667 mA as the active current. This isn't a bad thing from a linearity perspective.
Under such circumstances the value of the load resistance RL must be increased by 3x to maintain the same output level, hence the need for some form of buffer becomes increasingly important.
Cheers
Hierfi, the paralleling decreases input impedance which is little high for single AD and TDA1541 (50 Ohms?) The i/v resistor is same for any number of AD's as well as the output level. I tried single AD too, P. Rogic schematics, but was not satisfied with it. The internal buffer probably loads the i/v resistor too much and is weak (shared supply). With emitter follower the additional load is in the order of 1 MOhm. And dedicated supply helps on the output side.
I think there is some confusion here.
The internal buffer has a much higher input impedance. The Tz at pin 5 is 3 Megohms and that includes the buffer input impedance.
If you use an emitter follower, the ef will dominate the performance.
Even then, even when you use an external ef, the internal buffer is still connected to pin 5 so that load is still there.
So the idea to lighten the load by using an external ef doesn't work; it increases the load.
Jan
The internal buffer has a much higher input impedance. The Tz at pin 5 is 3 Megohms and that includes the buffer input impedance.
If you use an emitter follower, the ef will dominate the performance.
Even then, even when you use an external ef, the internal buffer is still connected to pin 5 so that load is still there.
So the idea to lighten the load by using an external ef doesn't work; it increases the load.
Jan
Mick Maloney of Supratek paralleled up from memory 8 x AD844's to get the input impedance right down, somewhere back in these pages for his TDA1541 dac, and was very taken by the sound.
Cheers George
That is correct. The impedance seen by the DAC is approx. 50/3 or about 16.7 Ohms if you parallel 3 units. Each takes 1/3 the input current, hence each mirrors the 1/3 input current into a common R load. This means that the output voltage doesn't change if all pin 5 connections are connected in parallel to the same R.
It does not follow that the i/v resistor would load the internal buffer in any significant way. Current mirrors isolate that effect. Harmonic distortion isn't a linear function of amplitude, hence as input currents increase the distortions can be thought as increasing exponentially, or conversely decreasing exponentially. Hence for a full scale current of 1mA feeding 10 paralleled AD844's each AD844 only responding to 1/10 of the full scale input current... hence less distorted.
If one considers a transfer curve the linearity improves by diminishing the current variance about the quiescent value (fixed in each AD844) until it becomes a non-distorted straight line. Paralleling devices can dramatically improve non-linearity. In conventional op-amps feedback is used to limit input variance in relation to the input quiescent.
Ok, then I'll live with the explanation that the internal buffer is just mediocre (without neg. feedback).
Heirfi, there is double effect of paralleling. First the TDA1541 responds well to lower impedance of the load, second the better linearity you describe.
Yes pin 5 is a very high impedance node and quite sensitive to any loading non-linearity. For gain setting, the best load at pin 5 is still a very good quality resistor, probably as linear as you can get.
The very best solution is probably to take that pin 5 signal and buffer it with a unity-gain opamp stage like an NE5534 or any of the other audio-type opamps like the LME or OPA series from the usual supects.
You could play with the value of the pin 5 loading resistor and the buffer opamp gain for lowest noise.
Jan
The very best solution is probably to take that pin 5 signal and buffer it with a unity-gain opamp stage like an NE5534 or any of the other audio-type opamps like the LME or OPA series from the usual supects.
You could play with the value of the pin 5 loading resistor and the buffer opamp gain for lowest noise.
Jan
I'd suggest its mediocre because its classAB and that means it places load-induced ripple on the supplies. A classA bias current source will help but that will again increase the loading on the Tz node.
Worth trying a current source biassed MOSFET with low enough parasitic capacitances and high enough transconductance (quite hard to find one which fulfils both) as source-follower buffer. One which comes close to the ideal is Toshiba's SSM3K56FS.
I'm not convinced that the OPS runs at such a high bias. ADI is kind enough to tell us about the OL Zout and the given figure is 15ohms. Given its a diamond buffer with EFs as the final pair that suggests more like 1mA as a maximum, assuming the Zout's measured when both devices are conducting and hence their Zouts are in parallel.
Remaining in classA isn't a guarantee of a constant current draw from the rails.
The 3K56 has 6pF of reverse transfer capacitance @10V and a gm of 100mS @ 8mA bias. If anyone knows of a transistor to beat it, do post a link to the DS here
Its downside is a rather fiddly-small package for DIY.
Remaining in classA isn't a guarantee of a constant current draw from the rails.
The 3K56 has 6pF of reverse transfer capacitance @10V and a gm of 100mS @ 8mA bias. If anyone knows of a transistor to beat it, do post a link to the DS here
Its downside is a rather fiddly-small package for DIY.
I'm not convinced that the OPS runs at such a high bias. ADI is kind enough to tell us about the OL Zout and the given figure is 15ohms. Given its a diamond buffer with EFs as the final pair that suggests more like 1mA as a maximum, assuming the Zout's measured when both devices are conducting and hence their Zouts are in parallel.
Remaining in classA isn't a guarantee of a constant current draw from the rails.
The 3K56 has 6pF of reverse transfer capacitance @10V and a gm of 100mS @ 8mA bias. If anyone knows of a transistor to beat it, do post a link to the DS here
The value of output current can't exceed the total current passing through the device at 6.5mA. The simplified schematic shows 5 current paths between the +ve and -ve power supply terminals... each appearing to consume equal currents to achieve thermal Vbe tracking. This suggests about 1.3mA of quiescent current in the output devices under idling.
Actually the output current can exceed the bias current. It's called class AB
But assuming your bias number of 1.3mA is correct (I thought it was a bit more), the max class A output current would be 1.3mA peak, which translates to almost 1mA RMS. That will allow almost 10VRMS across a load of 10k.
Generally output levels will be much lower than 10VRMS so that seems to indicate that the output buffer basically works already in class A.
Jan
But assuming your bias number of 1.3mA is correct (I thought it was a bit more), the max class A output current would be 1.3mA peak, which translates to almost 1mA RMS. That will allow almost 10VRMS across a load of 10k.
Generally output levels will be much lower than 10VRMS so that seems to indicate that the output buffer basically works already in class A.
Jan