ESS9018 - try new, try more...

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That noise (as you may see in some of my previous pictures) it is there only when the chip is active, and the clock signal start do its job inside the chip. This is quite easy to observe while a slow power up sequence. More, if the DC trigger level is not right at the clock pin of the chip, that noise did not exist.
The modulated HF noise on device output it is very well correlated (only) to the chip activity, and this it mislead me in my conclusions... But it seems that the chip activity, as some additional factors concerning maybe the device power system configuration, it trigger somehow that particular pattern oscillations.

I have to take a closer look at this issue, or behaviour... However it may be interesting with someone else (yours) observations/findings in this area, on a complete different DAC configuration.
 
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In my experiments I've noticed that residual noise is greatly reduced if the DAC output is measured differentially.

Have been your measurements referenced to the ground or to other output?

Always to ground...

Well, a differential probe it may show a better/different result. I have not that so far...
My measurements was not made on the DAC chip output pins, but on the device (system) output (XLR/RCA). That so called noise, in my case measured hundreds mV, for a 16Vpp audio signal, and was exclusively related to the DAC chip "work ready" status, and its clock signal also OK status. I was also using to appreciate the DAC chip well functioning, if that noise was present on the device output...
Now I suppose that a very small amount of the DAC real residual noise (normal also) it was triggering an not enough stable post DAC processing stage, and produced quite high level (specific pattern oscillations).
This is only a supposition or possible explanation, as on another device (including the same DAC chip), I did not notice such behaviour.
What is just amazing, is the exceptional sound and soundstage quality out of that device with quite high HF noises level on its outputs (balanced/unbalanced), while another one device (technically correct - not such high level HF noises) outputted a quite flat sound (as perceived)...
 
Are you using I2S or S/PDIF source?

Also S/PDIF signal can be source of this noise too its wires are not shielded correctly.

Using TPA 4ch S/PDIF converter kit the amount of noise is decreased if you provide eta 4.25V for this converter. Check the S/PDIF waveforms on the DAC input.
 
I have measured current draw on DVDD with the DAC idle, it receives I2S (BCK,WCK) but DATA is only zeros.

The scope shot is DVDD current measured as voltage through a 3R3 resistor. There is filtering to remove the HF, as I was only interested in current draw at low frequencies.

As you can see the DAC is doing something periodic. The period varies between about 15-60 Hz depending on I2S sample rate. As soon as signal is played, the current becomes signal dependent (and very ugly).

I have searched for a pulse train like you found. At some point I thought I had found it, but it was interference from mains.

I used a 1x probe with long ground wire and clip. This kind of setup is prone to picking up all sorts of crap, so it must be re-checked :

- I probe a signal, then I probe the GND close to that point, and GND at many points on the board. If I see the same signal when probing GND, it means it is picked up by the ground clip loop antenna (this was the case with the pulse train).

- I also solder a 50 ohm coax to the measurement point : this gives much cleaner measurements but it is not the most practical.

- Also, setting the scope trigger to Mains Line will tell you if it is interference from mains. If it does not move on the screen, this means it is synchronized to the mains, so it doesn't come from ES9018.

The analog output shows no trace of spikes repeating at around 50Hz.

Well, if I use the long ground clip, it does. Proper probing (coax soldered to output), and spikes disappear.

I connected the scope to the ES9018 output without filter (the modulator levels are clearly visible) and set it to window trigger, with the thresholds a bit outside of the top and bottom of the normal modulator output. If there are noise spikes (besides the normal HF noise generated by the modulator) then it will trigger. I set it to record before starting to write this post, and it still hasn't triggered on anything. I can get it to trigger if I switch on my soldering station (it has a huge transformer inside) but that would be expected...

So... I think your noise spikes don't come from 9018...
 

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Thanks peufeu for your efforts, and useful informations.

I think it may be expected some current activity on DVDD rail, as the chip it always does something on digital stage. Maybe your next step is to take a look at the AVCC (current) activity, or at VddL/R rails...
I did actually that measurement (current probe), comparing the measured power pin trace with a very near GND plane point. The measured levels on GND was as expected very near to zero (line trace)...

Investigations to be continued....
 
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Well, I found out about the modulated HF noise issue on my DAC system outputs. Quite embarrassing I may say...:( But mainly due to an already designed ES9018 based (consumer) system, I have used it for quite long time. My main fault: I should observe what was wrong with it for long time ago...

I have now a normal residual HF noise pattern, but much lower in amplitude. This is because my "no filtering" approach for the post DAC processing stage...
There is enough place now for further improvements, as the main issue is gone.
 
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Extremely interesting measurements on ESS DAC. This chip is not just as the ESS marketing build it its image... Just amazing I may say results, and never knew before measurements revellings here: (in French...)

https://www.youtube.com/watch?v=2QySxRcuPJs

ES9018 it degrade its performances (linearity) as the sampling frequency increase (over 48 Khz f. ex), is one of the measurements conclusions. There is not specified the clock frequency used for ESS DAC in these measurements, but it may looks to me as a possible explanation for increasing sound quality, when this chip is overclocked...
Ess9018 it lose precision at high sampling frequencies... Just unbelievable!
This so prised chip it have serious problems over 20bit resolution, even though it is advertised as an 32 bit resolution device...
It seems that this DAC chip is behind AKM and PCM17xx families in some areas of performances, but it still be very good when about noise levels.

Just before I got these informations, I was very surprised in some tests, by the sound of an PCM1792, comparing it with the sound out of an ES9018, when using the same post DAC processing stage on both chips. It looks like these measurements I have seen today it come to confirm what I heard...
Very interesting! A must see/know...
 
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Well, I did at least...

Bad things happen to everyone... It was my turn to experienced it...

As known maybe for some of the readers here, I developed and use a large filtering/decoupling capacities PSU for analogue power rails of ES9018 (AVCC and VddL/R). It works just wonderful, with very good results.
Recently after installing a such PSU, I did not paid enough attention and switched in between these power rails for the chip. I mean the AVCC power of 3,7v it was connected to VddL/R, and vice versa. So the VddL/R (specified level 1,2v) it got 3,7v, and AVCC it got the 1,2v power. The both regulators was in current limiting stage, so the outputted tensions was low levels. The current trough circuits was increasing quite much, so that was obvious the heat dissipation on both PSU and chip. Well, it took a little time to measure all around the chip, and then taking finally the decision to disconnected the whole device... That was not enough, and I powered the device once more to measure again... After second measurement session, I saw the fault...
Noticing the "fatal" inversion of the power rails, I was already mentally prepared to replace the DAC chip... But I was thinking to try however the right powering, once more before unsolder the chip.
You just wont believe it: It was working so well as nothing happened.
I only think this is just amazing. Almost 4v on VddL/R pins, and it pass the "test"... It looks like the designers have predicted quite much under developing/designing process of this chip. However very impressive!

But I do not recommend at all to anybody to test the ES9018 powering limits, unless one it target especially a such limit testing (destroying) approach...

PS. I just realized that today is Friday the 13th...:D
 
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I have to make a correction in the above post, when about the mentioned almost 4v tension applied to VddL/R.
I can remember now that the AVCC regulator it delivered, under current limitation, connected to VddL/R pins, a 2,6v level. However, it looks like the current through it it was enough important to produce quite high thermal dissipation.
It seems that the VddL/R rail it have some sort of power limitation mechanism, in case wrong tension levels applied to these pins...