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Zen -> Cen -> Sen, evolution of a minimalistic IV Converter
Zen -> Cen -> Sen, evolution of a minimalistic IV Converter
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Old 26th July 2018, 12:01 PM   #2121
bern is offline bern  Poland
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Hi,
Could I use one 'stonger' eg 1000mAh battery for both channels instead of two separate batteris for each channel? Is there any sonic adventage to use separate battery for dedicated channel?
Regards,
B
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Old 26th July 2018, 12:44 PM   #2122
EUVL is offline EUVL  Europe
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No. Circuit will NOT function
One sets of batteries for each channel.
So 8 sets for 7+1, e.g.

Already explained before.


Patrick
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Old 11th August 2018, 07:58 AM   #2123
bern is offline bern  Poland
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Hi,

I have got 4x 2Sk146 which I want to use in the SEN topology. For the single channel I will use 2x PCM1704 in parallel. Since 2SK146 is two JFET in one aluminum enclosure I would like to ask how to connect two 2SK146 per channel (A or B from enclosed schematics to better cope with heat dissipation/alignment?
Thanks,

Bern
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File Type: png SEN_2SK146.png (58.3 KB, 312 views)
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Old 11th August 2018, 09:19 AM   #2124
EUVL is offline EUVL  Europe
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B, for thermal tracking.


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Old 11th August 2018, 10:08 AM   #2125
bern is offline bern  Poland
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Thanks,
I've measured Idss of my JFETS (2SK146BL). The total of lower and upper pairs of Jfets are 20.6 and 20.7mA for the left channel and 20.62 and 20.72mA respectively for the right channel (see enclosed details). Do you think that 0.1mA Idss mismatch/difference could be an issue? If so how could I limit the adverse impact?

I've build two 10x3.6V (18650) 36V Li-ion battery. Theoretically fully charged single battery should give 42V DC. Do you think that such voltage will be safe for SEN?
TIA,
Bern
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Old 11th August 2018, 10:37 AM   #2126
EUVL is offline EUVL  Europe
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> Do you think that 0.1mA Idss mismatch/difference could be an issue?

Will end up as a small DC at the current input.

> If so how could I limit the adverse impact?

Add a small degeneration resistor to the source of the higher current and trim the DC voltage to Zero at the current input.

> I've build two 10x3.6V (18650) 36V Li-ion battery.

Why would you need 36V ?
Have you calculate how much power you will dissipate, and what is the maximum rating for your FETs ?


Patrick
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Old 11th August 2018, 11:30 AM   #2127
bern is offline bern  Poland
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Quote:
Originally Posted by EUVL View Post
>
.........
Why would you need 36V ?
Have you calculate how much power you will dissipate, and what is the maximum rating for your FETs ?


Patrick
I have spare, unused 36V batterry from other project which I would like to use in SEN.
I've read in the LA article:
"...you can go further to 27V or 36V if you wish. The benefit of higher voltage is lower JFET capacitances, which in turn means higher bandwidth and lower distortion."

Roughly I calculate the power of single JFET P=UxI so 36Vx0.01A=0.36W
so maybe for 4 fets should be 1,44W and 1,68W (with max 42V)

For single 2SK146 MAX Gate-Drain Voltage (VGDS) is -40V (as datasheet says) but in SEN schematics there are two Fets in paralell so I assume that I can use max 42V (correct me if I'm wrong).
Thanks
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Old 11th August 2018, 02:43 PM   #2128
EUVL is offline EUVL  Europe
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I would not want to run TO92s for more than 60C at the case.
So you can do a simple experiment to find out how hot they get at 18V Vds at Idss.


Patrick
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Old 12th August 2018, 09:06 AM   #2129
bern is offline bern  Poland
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Quote:
Originally Posted by EUVL View Post
L = 10mH Fastron 77A series
DCR = 12R
dV ~ 0.5V @ 45mA

C = 10000uF 16V Vishay BC 056 Series

f_RC = 1.3Hz (1st order)
f_LC = 16 Hz (2nd order)


Patrick
Hi,

As I understood the battery LC filter should looks like on schematics A.

Would be any advantages to use two inductors (see variant B)?
Regards,

Bern
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Old 12th August 2018, 09:11 AM   #2130
EUVL is offline EUVL  Europe
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I am afraid that these are all design decisions that you have to make yourself.


Cheers,
Patrick
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