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Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter
Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter
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Old 1st August 2020, 02:14 PM   #5391
JCMcNeil is offline JCMcNeil  United States
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Join Date: Jul 2019
Location: Charleston, SC
Question u.fl adapter for McDual/McFifo <--> MiniSharc?

A related question for anyone- is there an adapter/breakout board for the MiniSharc* to u.fl connectors?

Or would I need to come up with something? With MiniSharc and the 2 Scottish feuding clans McDual and McFifo** making seemingly such a good match, this seems like something that should exist if it does not.

*I had MiniDSP solder a female header to j2 (2x15 pins) on mine. By default they come with no header.

**Correcting jitter helps spacial recognition of the various pipes on bagpipes, right?

Quote:
Originally Posted by JCMcNeil View Post
Thank you for the info, Ian.

So I would just run i2s from the Raspberry Pi header to the MiniSharc? Should I not do something to clean up the jitter and noise ahead of the MiniSharc?

Keeping the McFifo/McDual close to the dacs should be no problem as I have a large chassis available it will all fit in.

And are they currently available for purchase?
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Old 1st August 2020, 10:07 PM   #5392
wcwc is offline wcwc  United States
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I am not aware of any breakout boards for ufl connectors for the minisharc. I will essentially have two master clock sources upstream of a mcFifo. I have a FIfiPi (feeding through a HDMI receiver and a minisharc) and a MCH streamer (which can only be a master). Would I just not send the Masterclock signal to the McFifo?

The McFifo has 7 I2S data signals, which is what I need. I will be feeding 7 DACs so looks I will be designing my own clock board since McDualXO board can only support up to 4 DACs. I guess I could still use the McFifo.
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Old 2nd August 2020, 10:13 PM   #5393
JCMcNeil is offline JCMcNeil  United States
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Question FifoPi Q2 Ultimate + McFifo?

Quote:
Originally Posted by wcwc View Post
I am not aware of any breakout boards for ufl connectors for the minisharc. I will essentially have two master clock sources upstream of a mcFifo. I have a FIfiPi (feeding through a HDMI receiver and a minisharc) and a MCH streamer (which can only be a master). Would I just not send the Masterclock signal to the McFifo?

The McFifo has 7 I2S data signals, which is what I need. I will be feeding 7 DACs so looks I will be designing my own clock board since McDualXO board can only support up to 4 DACs. I guess I could still use the McFifo.
My understanding is you can only have one master clock source but maybe someone with more experience in such matters can chime in.

Similarly, I'm wondering if I can send the Master Clock signal from FifoPi to McFifo or if I really need to get McDual.

Or, maybe I could get by without McDual but the benefits are well worth the expense? But, then what about Master Clock conflict and if FifoPi isn't cleaning up the Raspberry Pi signals, won't that pollution permeate the whole system? Or can FifoPi lock in to an external clock from McDual? Or will they get into an, ummm, McDuel?

Cheers

Chris
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Old 3rd August 2020, 12:51 AM   #5394
wcwc is offline wcwc  United States
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You need mcDual or some other clocking board after the McFifo. FifoPi won’t work in this application. You need 4 data connections. McDual gives you 7 data signals, 4 word clock, 4 bit clocks, and 4 master clocks. So you can connect 4 stereo DACs. I think you need the McDual board more than you need the FIfoPi.

Regarding the FIFOPi, it can only be a master. Minisharc can be either an input or an output slave. So you can have the McFIFO back feed the McDual masterclock signal to the minisharc. The RaspberryPi has no masterclock signal. So if you backfeed the clock signals it should do a good job on the RaspberryPi clock signals. If you are still concerned, you can use a FIFOPi after the RaspberryPi. Just don’t connect the masterclock signal to the McFIFO.

In my case, I think the McFIFO and McDual combo will work fine. My other 3 data signals are being fed from different boards with differing masterclocks and they are the center and surround DACs, so not as critical. So I I will run them without reclocking. I will also be using a FIFOPi since I already have it. My streamer is In a separate enclosure from my DAC. I will have a USBridge, ReceiverPi, FIFOPI, TransportPi. I have a HDMI receiver in my DAC that will receive I2S from HDMI in the TransportPi. So My FIFOPI is also reclocking the SPDIF signals on the TransportPi. I will not send the masterclock signals from the HDMI receiver or from the MCH streamer (my two inputs to the minisharc). I will feed the minisharc the McDual masterclock signal. I will have a decent delay on my audio due to going through 2 FIFO buffers, but I should be able to account for it in DSP.
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Old 3rd August 2020, 02:35 PM   #5395
JCMcNeil is offline JCMcNeil  United States
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Default jumping the Sharc

Quote:
Originally Posted by wcwc View Post
You need mcDual or some other clocking board after the McFifo. FifoPi won’t work in this application.
I see I need to study the McFifo manual as it wasn't clear to me that the FifoPi would not, umm, jump the Sharc.

Quote:
Originally Posted by wcwc View Post
Minisharc can be either an input or an output slave. So you can have the McFIFO back feed the McDual masterclock signal to the minisharc. The RaspberryPi has no masterclock signal. So if you backfeed the clock signals it should do a good job on the RaspberryPi clock signals. If you are still concerned, you can use a FIFOPi after the RaspberryPi. Just don’t connect the masterclock signal to the McFIFO.DSP.
I have the MiniSharc set up as both input and output slave as per the manual.

I functionally understand the Pi's limitations, I'm just not as clear on how the buffering can best enable jumping the Sharc forwards or backwards for reclocking. Going earlier in the chain with McDual seems counterintuitive but I suppose the buffer enables that. (?)

And I was not aware that McFifo could not use and distribute the clock from FifoPi, so thanks for.explaining.

Quote:
Originally Posted by wcwc View Post
In my case, I think the McFIFO and McDual combo will work fine. My other 3 data signals are being fed from different boards with differing masterclocks and they are the center and surround DACs, so not as critical. So I I will run them without reclocking. I will also be using a FIFOPi since I already have it. My streamer is In a separate enclosure from my DAC. I will have a USBridge, ReceiverPi, FIFOPI, TransportPi. I have a HDMI receiver in my DAC that will receive I2S from HDMI in the TransportPi. So My FIFOPI is also reclocking the SPDIF signals on the TransportPi. I will not send the masterclock signals from the HDMI receiver or from the MCH streamer (my two inputs to the minisharc). I will feed the minisharc the McDual masterclock signal. I will have a decent delay on my audio due to going through 2 FIFO buffers, but I should be able to account for it in DSP.
That's quite a system you have!

My understanding is that the MiniSharc will.not take a Master Clock signal when it is in slave/slave mode. I could bypass the Sharc and share the Master Clock directly with the DACs from FifoPi but these old multibit chips only want Bit Clock, Word.Clock,.and Data. (I also have some AD1865 chips to test and I understand I will need to adapt i2s to that chip's different needs.)

I chose slave/slave mode to access better clocks than the MiniSharc's and to avoid its ASRC, which the manual explains is not active in that mode. I've been warned it is dangerous and should be kept away from small children.

Instead, I use Volumio's resampling feature, with the quality algorithm set to "very high", Cheech and Chong style, to get the music in 96/24.

I imagine there must be better ways to resample than Volumio so (any random reader) please share any ideas.

I haven't finished building the first 4 (TDA1387 based) DACs but it sounds decent - at least as good as my well-optimized Allo.Boss 1.2 if not quite my Chord Mojo - playing full-range through my Audeze Sine headphones as I tweak DAC and IV-filter variables. DSP on the Sharc is set flat pending getting it into my primary system.

Thanks again for the insights.

Last edited by JCMcNeil; 3rd August 2020 at 02:44 PM. Reason: fix mobile typos
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Old 3rd August 2020, 04:08 PM   #5396
JCMcNeil is offline JCMcNeil  United States
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Question Re: FifoPi Q2 Ultimate + McFifo?

I am trying to clarify my understanding on whether I need to get a McDual in order to use McFifo in my multi-amp system.

wcwc wrote "You need mcDual or some other clocking board after the McFifo. FifoPi won’t work in this application."

However, in the McFifo manual, I read "Works with McDualXO clock board, third party clock board or DAC local XOs." which, to me, implies I can send it the master clock from FifoPi Q2 Ultimate, jumping the Sharc in the chain, and let McFifo do it's thing to reduce jitter, especially that generated by the MiniSharc DSP, ahead of the 4 stereo Dacs.

The questions are,

1. will FifoPiQ2 Ultimate serve the master clock function in a system including MiniSharc and (post MiniSharc) McFifo as the McFifo manual seems to indicate? Or, do I have to switch to McDual for the Master Clock?

2. Or is McDual simply a better way?

3. And, if the latter, what makes it better?

Plan A: Raspberry Pi 4 + Volumio _> FifoPi Q2 Ultimate -> MiniSharc -> McFifo -> Dacs (etc)

-vs-

Plan B: Raspberry Pi 4 + Volumio -> MiniSharc -> McFifo -> McDual -> Dacs (etc)


Quote:
Originally Posted by JCMcNeil View Post
I see I need to study the McFifo manual as it wasn't clear to me that the FifoPi would not, umm, jump the Sharc.

...
And I was not aware that McFifo could not use and distribute the clock from FifoPi, so thanks for.explaining.
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Old 3rd August 2020, 08:47 PM   #5397
wealas is offline wealas
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Check your DACs and count how many MCLK, SCK and LRCK signals you will need. Then count how many of those the McFifo provides. You can't split any of those with just wires, for best results you need buffers and that's what the McDualXO provides along with the clock selection circuit the McFifo needs ( I don't know if that's exposed on the FifoPi).
Basically, you can feed one 8ch DAC directly from the McFIFo, but you need the McDualXO to feed 4 2ch DACs.
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Old 3rd August 2020, 10:09 PM   #5398
JCMcNeil is offline JCMcNeil  United States
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Join Date: Jul 2019
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Quote:
Originally Posted by wealas View Post
Check your DACs and count how many MCLK, SCK and LRCK signals you will need. Then count how many of those the McFifo provides. You can't split any of those with just wires, for best results you need buffers and that's what the McDualXO provides.
Ok, that makes more sense now. As I underatand it, I'll either need McDual or a 3rd party or DIY buffering solution for Bit Clock and Word Clock.

The DAC chips I am experimenting with - TDA1387, AD1865, and TDA1541a - don't require a Master Clock signal.

Quote:
Originally Posted by wealas View Post
Check...along with the clock selection circuit the McFifo needs ( I don't know if that's exposed on the FifoPi).
MiniSharc requires or resamples everything to 96/24 so I don't think that's relevant to this project, but I get the point.

Thanks for taking the time to clarify. Since I already own The FifoPi Q2 I wanted to utilize it if possible. Now I see there is a buffering need that McFifo alone won't meet.
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