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I2S: Master Clock relationship with BCLK and LRCLK
I2S: Master Clock relationship with BCLK and LRCLK
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Old 27th August 2010, 05:05 PM   #1
mahen.jnk is offline mahen.jnk
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Join Date: Jan 2010
Default I2S: Master Clock relationship with BCLK and LRCLK

I amd trying to interface I2S audio from MCU connected to the DAC. Is it OK if I just use the LRCLK, BCLK and SDATA from teh MCU and connect the clean external Master clock (128-512Fs)to the DAC ignoring the MCLK from the MCU. What does the following statement from PCM1798 datasheet mean? Is it necessary to supply th same master clock that was used by the source (MCU) to generate LRCLK and BCLK and SDATA?

"The PCM1794 requires the synchronization of LRCK and the system clock, but does not need a specific phase relation between LRCK and the system clock. If the relationship between LRCK and the system clock changes more than +/-
6 BCLK, internal operation is initialized within 1/fS"

m.j



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