Terry Demol said:
Hello Terry,
You must not own many old CDs.
I probably have 20 or 30 pre-emphasized discs in my collection, all from the 80s. And these are just the ones I have kept.
I have found that some very poor SPDIF sources can actually fail to lock, or become locked and then unlocked even after locking at the "LOWEST" DPLL settings. This sounds aweful...
Cheers!
Russ
Terry Demol said:
That's a good question, it was not my source, so I did not dig very deeply.
All of my sources have no issues at all even at the LOWEST DPLL setting.
I think some sources just have some poorly implemented SPDIF outputs.
My best guess is it is noise that was the culprit, but I can't be sure. Termination of the DAC end is just fine, but source termination could be an issue.
Ross also has had similar experiences with a DVR of some sort I believe.
Cheers,
Russ
Terry Demol said:
Russ White said:
I have tested two devices with very poor SPDIF outputs. I described the first one earlier in this thread, a Sony DVR on the digital cable at my home. The other poor source is a Sangean HDT-1X HD radio. Both of these use TOSLINK outputs, so termination or noise was not the issue. The sources just have lots of jitter. HD radio is not really high-definition, it is a compressed digital signal added on to the radio station's main analog signal.
Both I can get to lock by setting the DPLL down to 101 or "Medium-High Bandwidth". The Sabre will not stay locked on them with a lower DPLL setting.
Using the Wolfson 8804 as a SPDIF receiver and converting to I2S helped out a little. When I tried to feed the Sangean HD radio signal into the Sabre as SPDIF without the Wolfson chip, I had to set the DPLL to 111, highest, to get the clicking to stop.
I have never had a loss of lock playing 44.1K material at the lowest DPLL setting, 001, from my wired network devices. The Popcorn Hour or the SMCWAA-G. The 001 setting gives absolutely excellent stereo soundstage and imaging.
All the CD/DVD players that I have tried will play 44.1K material at the lowest DPLL setting, 001.
Occasionally the signal from the DVD player will lose lock when playing 88.2K or higher material at the lowest DPLL setting, 001. This is very strange because it will only happen about once every ten minutes. All I have to do to fix it is set the DPLL down to 010. The hi-rez material still sounds great at the "low bandwidth" setting 010, so that is not a problem.
Russ,
Well in my experience SPDIF has never been as good as I2S. So much so that I don't do any SPDIF at all anymore. Common it was not even a concrete design when it was invented. It was merly a way for Philips to test CD players without opening them up.
~~~~~
In regards to clocks and something Guido taught me years ago is that it doesn't matter if you spend $1 or $400 on a clock. If your power supply is not right then forget it. The modulation of the power supply is the primary culprit for jitter.
On my Sabre board I have I think 8 supplies. The OSC supplies that power the 0.5ps Crystek units were designed over the last 9 months. Funny thing is that the supplies for Guido's clock was not the same as the Crystek. The Crystek required allot more work. Anyways between 1-5hz the supply is less than 50pV of RMS noise. Above that it goes down lower. There are I think 18 parts in the discrete supply for the two oscillators.
The analog supplies (3.3 and 1.2 right and left) are all discrete with zero feedback and come in a little higher at 140pV rms from 1-50hz, lower above that.
There also seperate supplies for the upper and lower ring and the internal 1.2. I found some stellar cell phone regulators for those that are real nice a less than 180pV.
Off my soap box for now... boards in today. Should have something running by next week.
FYI I am doing TAS1020B USB using my ASYNC custom code to the Sabre.
Thanks
Gordon
Well in my experience SPDIF has never been as good as I2S. So much so that I don't do any SPDIF at all anymore. Common it was not even a concrete design when it was invented. It was merly a way for Philips to test CD players without opening them up.
~~~~~
In regards to clocks and something Guido taught me years ago is that it doesn't matter if you spend $1 or $400 on a clock. If your power supply is not right then forget it. The modulation of the power supply is the primary culprit for jitter.
On my Sabre board I have I think 8 supplies. The OSC supplies that power the 0.5ps Crystek units were designed over the last 9 months. Funny thing is that the supplies for Guido's clock was not the same as the Crystek. The Crystek required allot more work. Anyways between 1-5hz the supply is less than 50pV of RMS noise. Above that it goes down lower. There are I think 18 parts in the discrete supply for the two oscillators.
The analog supplies (3.3 and 1.2 right and left) are all discrete with zero feedback and come in a little higher at 140pV rms from 1-50hz, lower above that.
There also seperate supplies for the upper and lower ring and the internal 1.2. I found some stellar cell phone regulators for those that are real nice a less than 180pV.
Off my soap box for now... boards in today. Should have something running by next week.
FYI I am doing TAS1020B USB using my ASYNC custom code to the Sabre.
Thanks
Gordon
Wavelength said:
What do you folks think about the Crystek CCHD-950?
I was waiting for another TCXO but after a loong time with the Vectron representatives... They stopped answering.
It was an amazing TCXO with 155dB phase noise floor... But the point was it had way MUCH less low frequency noise (more than 10dB @ 10Hz) than the 950
Good thing is that the Crystek is inexpensive.
Now that you told me clock doesn't plays much with this dac...
Re: DPLL
A good place to start would be information in the white paper:
Technical Details of the Sabre Audio DAC
http://www.esstech.com/techsupp/sabrewp.pdf
just.sounds said:
A good place to start would be information in the white paper:
Technical Details of the Sabre Audio DAC
http://www.esstech.com/techsupp/sabrewp.pdf
Okay, here's what's up:
I opened up for pre-orders for this round on June 30th, and sold out in about 8 hours.
A large percentage of people ordered IVY's and power supplies, so I have roughly 3x kits to get together, in addition to the Buffalos to build and other bits people ordered.
I am on track to ship all of these this week, starting today, hopefully (if the day job doesn't get in the way too much ).
I hope to have another batch available in the next few weeks, but since for each Buffalo there is typically three additional kits I have to build, and I am a one man kit building show, I will need to keep the batches smaller to keep my head from exploding.
The benefit of this will be more chances to get one if you are not on the forums or our site all the time. I will make an announcement of when each batch will be available well in advance. They will likely be available every 3-4 weeks to allow build time.
I opened up for pre-orders for this round on June 30th, and sold out in about 8 hours.
A large percentage of people ordered IVY's and power supplies, so I have roughly 3x kits to get together, in addition to the Buffalos to build and other bits people ordered.
I am on track to ship all of these this week, starting today, hopefully (if the day job doesn't get in the way too much
).I hope to have another batch available in the next few weeks, but since for each Buffalo there is typically three additional kits I have to build, and I am a one man kit building show, I will need to keep the batches smaller to keep my head from exploding.
The benefit of this will be more chances to get one if you are not on the forums or our site all the time. I will make an announcement of when each batch will be available well in advance. They will likely be available every 3-4 weeks to allow build time.
wobbly said:
I believe that when we speak of absolute phase inversion in a digital product, the signal is "upside down".
Since the Sabre has a differential output, you can just treat the left channel + output as really being the -, and the left - as the +. Just swap the wires. And ditto for the right channel.
It's not so easy to deal with if you use a DAC that is single ended and not differential, but we don't have that problem here in this thread on the Sabre
AsI havnt recieved the kit yet I havnt read the ESS or T.P paperwork,,but is the invert function a software option or a simple pin/dip ground issue that would enable a front panel switch.
Also Dustin I would be interested to find out the reasoning behind your choice of the bitclock at 64fs Vs any other number ie 48fs as per the Philips CD PRO2 - as above, this means the dac and transport arent "plug and play"compatable.
Also Dustin I would be interested to find out the reasoning behind your choice of the bitclock at 64fs Vs any other number ie 48fs as per the Philips CD PRO2 - as above, this means the dac and transport arent "plug and play"compatable.
digital volume control?
I always thought that digital volume control was "bad" and all volume control should be done in analog. Reason: you only have so many bits, so if you digitally scale values from (let's say) 0-255 to go only from 0-15 you have only 16 different levels left when you started with 256. If you scale in analog you still have 256 levels between 0 and 15. The latter presumably having more fidelity. Is that argument missing the point?
(I hope not to unleash a big argument here... Just point me someplace I can educate myself.)
Or is this something that's special about the ESS chip that it can do this the "right" way and the above argument is still correct in a more generic context?
peter
I always thought that digital volume control was "bad" and all volume control should be done in analog. Reason: you only have so many bits, so if you digitally scale values from (let's say) 0-255 to go only from 0-15 you have only 16 different levels left when you started with 256. If you scale in analog you still have 256 levels between 0 and 15. The latter presumably having more fidelity. Is that argument missing the point?
(I hope not to unleash a big argument here... Just point me someplace I can educate myself.)
Or is this something that's special about the ESS chip that it can do this the "right" way and the above argument is still correct in a more generic context?
peter
