ESS Sabre Reference DAC (8-channel)

FuriousD said:


As for the other digikey Crystek crystal, you have suggested a crystal with unspecified close in phase noise, ....

If you would have bothered to read the prior posts in the thread, I modified the demo board with the best oscillator part that I had on hand. (if that is what you mean by "the other Crystek part")

I didn't buy the part specifically for the purpose of modifying the demo board.
 
Wingfeather said:

I realise I'm a little late, but I recommend you check out York University for this (you are in the UK, ya?). I'm in my final year of a masters there and the course is really quite good for audio.

It's not late, thanks for this. My future wife is currently doing Computer Games Design & Programming (a woman you can play X-box 360/PS3 with :D and lose badly :dead: ), so I need wait until she's done, but York is an excellent university.

I do have a house and good job down south that will not travel that far north plus all family is down south. I've done my fair share of living far from family (high school in Canada while parents in England, and uni away from home when back in the UK). Does the course offer distance learning? Surrey University is my actual local uni.

Did you do Electronics A-level first, or is the first year foundation in maths and electronics? If not at York, wherever you did a BSc first?
 
Apologies for thread-drift, but I've just found the new 'scope at work we got for USB compliance testing (*) has the jitter analysis package installed - can think of *another* use for this!

Might take a day or so to get it up and running but hopefully I can post some actual phase noise measurements of a few oscillator modules I have here. Hopefully will show the difference between the two buck variety and the $$ txcos being suggested.

I'm still working on schematics for my ESS board so it'll be a while before I can check the performance of the ES9008 myself. Very interested to hear how you guys get on with the eval boards.

Local rep made me sign an NDA before I could order parts - I wonder how long this will go on before the catalog distributors start stocking them?

-Len.


(*) Tek DPO7254 with DPOJET s/ware
 
len_scanlan said:

Might take a day or so to get it up and running but hopefully I can post some actual phase noise measurements of a few oscillator modules I have here. Hopefully will show the difference between the two buck variety and the $$ txcos being suggested.


That's really cool, Len. I will be happy when you will be able to measure a difference between the 20 cent, two buck, 20 buck, and $100 VCXOs. It will take an significant investment in circuit board design to make a test measurment that I will believe.

The real test is about the hearing of a difference between any or all of the above. Some of you guys make too, too much out of the specification game.

Of course, if money is no object in oscillators for our DACs, we can order an atomic clock from the National Bureau of Standards. :smash: < / sarcasm>
 
rossl said:


That's really cool, Len. I will be happy when you will be able to measure a difference between the 20 cent, two buck, 20 buck, and $100 VCXOs. It will take an significant investment in circuit board design to make a test measurment that I will believe.

The real test is about the hearing of a difference between any or all of the above. Some of you guys make too, too much out of the specification game.

Of course, if money is no object in oscillators for our DACs, we can order an atomic clock from the National Bureau of Standards. :smash: < / sarcasm>


Ha ha that raised a smile!, I can just see some tweaker out there with an oscillator the size of a fridge connected to this teeny weeny little DAC chip!

I think that when it comes to clocks, surely everyone will agree that the less jitter / phase noise, the better. Like you say, the question is whether you can hear any differences between product 'A' and product 'B'. All I'm suggesting here is finding out the point of diminishing returns beyond which you get no useful improvement in sound quality. If this part turns out to be more immune to jitter than competing DACs, then maybe a two buck oscillator can will be enough.

I'm going to start a new thread for my oscillator measurements, this is getting too off topic.

Now back to my schematics. (I'm designing a CD player upgrade using this part - a plug-in module)

cheers,

Len.
 
len_scanlan said:



Ha ha that raised a smile!, I can just see some tweaker out there with an oscillator the size of a fridge connected to this teeny weeny little DAC chip!

I think that when it comes to clocks, surely everyone will agree that the less jitter / phase noise, the better. Like you say, the question is whether you can hear any differences between product 'A' and product 'B'. All I'm suggesting here is finding out the point of diminishing returns beyond which you get no useful improvement in sound quality. If this part turns out to be more immune to jitter than competing DACs, then maybe a two buck oscillator can will be enough.

Len.

It would depend on the jitter rejection characteristics of the SRC.

Dustin - is it possible for you to give any information WRT jitter
rejection corner freq and rate (slope) of attenuation.
As you are probably aware, AD1896 etc have this info on the data
sheet.

cheers

Terry
 
len_scanlan said:

Now back to my schematics. (I'm designing a CD player upgrade using this part - a plug-in module)

cheers,

Len.

That sounds like a worthwhile project, Len.

There is another thread here about upgrading the analog output of the Behringer DEQ2496. It occurred to me that it would be a good candidate for a Sabre8 drop in board to replace the AKM DAC and the low-grade op-amps.

The add-in board would take the SPDIF out of the DSP equalizer.

This is something most DIY people could do easily. Here we have a box with the appropriate digital inputs jacks, analog output connectors and power supply.

The Behringer SRC2496 is also a good candidate. It has three digital inputs that are switched before going to the CS8420 resampler chip. The SPDIF could be picked off just before it gets to that horrid old Cirrus Logic chip and it's pitiful noisy clock.

The SRC2496 also has a low grade analog output section that could be replaced with a decent design.

Both of the two Behringer boxes have room inside the case for add-in boards.

I'm sure there is enough power supply current available for the digital parts of the board. We would have to analyze the op-amp supplies to see if there is enough current there. I suppose there would be if we disconnected the juice to the existing op-amps.

:D
 
Disabled Account
Joined 2006
len_scanlan said:
finding out the point of diminishing returns beyond which you get no useful improvement in sound quality
Well, the question becomes how you can define "useful improvement in sound quality". If you mean indistinguishable in blind testing, there's always the question whether a difference might not be audible when other parts of the signal chain are improved--most notably speakers/headphones, which even in their modern incarnations have high distortion.
 
abzug said:

Well, the question becomes how you can define "useful improvement in sound quality". If you mean indistinguishable in blind testing, there's always the question whether a difference might not be audible when other parts of the signal chain are improved--most notably speakers/headphones, which even in their modern incarnations have high distortion.

In the context of my own work, useful improvement means I feel its worth spending the extra money on a more expensive component - I'm working on my own project, so my own ears are the final judge and jury. If I'm happy with the sound, thats good enough for me!

cheers,

Len.
 
Re: SuperDAC

FuriousD said:
Dustin can you save me some time here and post the answer here please? Does the Sabre DAC use an internal PLL and buffer to reclock the data? does the DAC at the output clock the data out using this PLL clock or does it use the input master clock?
[/B]


There is no analog PLL inside the chip, The data simply comes into the chip at the bitclock rate, then there is a circuit that takes the date into the XI clock domian and makes sure that jitter is not introduced.
 
Terry Demol said:


It would depend on the jitter rejection characteristics of the SRC.

Dustin - is it possible for you to give any information WRT jitter
rejection corner freq and rate (slope) of attenuation.
As you are probably aware, AD1896 etc have this info on the data
sheet.

cheers

Terry



The corner frequency is around 0.1Hz or so.

Thnaks

Dustin