Simple FIFO to I2S CPLD, for MCU players / reclocking

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I used dsPIC at "Ultimate Source" project,
http://www.diyaudio.com/forums/showthread.php?s=&threadid=90725
Then I could make small WAV file player working with genuine 11.288MHz/44.1kHz/16bit.

But I'm not satisfied because it is straitjacketed to dsPIC.
I searched threads and google to look for simple I2S generator, but can't find (I'm not good at google?).

Attached is veeery simplified I2S generator.
It only needs 8 bit width FIFO, CPLD, and 11.288MHz.

Principle "no wisdom / foolish simple"
(1) 6bit counter, generates 64 states. (same as I2S 64clock/frame)
States are L01-L32,R33-R64.
(2) CPLD generates READ# pulse when FIFO is ready, at state R45,47,49,51. store data to registers.
When FIFO is not ready, Registers filled with 0x00.
(3) CPLD outputs LRCK, SCK, SD.
SD is selected from register bit, by state.
So if data is ready, it generates 44.1kHz/16bit I2S signal, and data is not available, just generates 0000000 I2S.

Requirement for MCU
It has some "receiving" interface > 176.4KB/s.
It can write FIFO, 8bit parralel, at least > 176.4KB/s. order is Left lower, Left Upper, Right lower, Right Upper.
Byte Order is same as WAV file format.

Requirement for FIFO: almost nothing. just 8 bit or more, 4 word or more.

I will post VHDL code if it works. (will be tested by FTDI FT245R)
 

Attachments

  • fifotoi2s.pdf
    13.4 KB · Views: 1,013
Thank you for responce. here is mapping result. what is TB?

Device Used: XC9572-10-PC44
Fitting Status: Successful

************************* Mapped Resource Summary **************************

Macrocells,Product Terms,Block,Registers,Pins
Used/Tot,Used/Tot,Used/Tot,Used/Tot,Used/Tot
49 /72 ( 68%),113 /360 ( 31%),108/144 ( 75%),42 /72 ( 58%), 15 /34 ( 44%)
 
Attached contains current VHD, UCF, TestBench, Report.
(ISE Simulator)

>blu_line
Maybe you have better test-bench than me!:)

>rfbrw
this thing does "FIFO to I2S" that's all.
I can not find this kind of simple device in diyaudio / google (maybe already exists but I can not find).

this thing simplify digital audio playback.
almost any micro processer can be used for audio playback.
Linux player just send FIFO and forget, to play music.
DAC DIYer can make re-clocking easy.

application, with accurate I2S output
small hard-disk player
yet another AirPort Express / squeezebox
handy SD-Card player
USB FIFO(FT245R) Playback device (I will try it)
 

Attachments

  • main.zip
    9.6 KB · Views: 376
Wave shows SD and LRCK. I think it is working like I thought, and lower photo, CS4334 test dac is playing Bach.
(wave form is not clean, LRCK is gated or output / not latched. maybe LRCK/SCK/SD should be re-sampled..)

I wrote simple sample source (read wav / send blocks to FIFO) and there are still noize, by FIFO underrun. I will think later.

Anyone please try same way with more powerful device.:)
I think Cypress EZ-FX2 (480Mbps) and larger CPLD can play 24/192, 4-way data for multi-amplifier. much cheaper than RME/Lynx.
 

Attachments

  • testing.jpg
    testing.jpg
    92.2 KB · Views: 1,895
this simple CPLD (FIFOtoI2S) works fine.
SN74ACT7808 or other generic FIFO can be used with this CPLD.

but...
It looks like I can not provide continuous data stream by FT245R and D2XX driver:(
D2XX driver does not eat data block > 128kbytes.

FYI:
Attached is current VHDL/ucf/fitting report/sample source code.
This code dumps PCM information,
read all PCM data into Memory,
then put 61440bytes data block to FTDI. (and I can hear 61440bytes/176400bytes cycle underrun noise, by SD goes to 0x0000 ...OMG. I need true FIFO between FT245R and CPLD)

finename = '01_Bach_147a.wav'
[RIFF] (36848820 bytes)
[WAVEfmt ] (16 bytes)
Data type = 1 (1 = PCM)
Number of channels = 2 (1 = mono, 2 = stereo)
Sampling rate = 44100Hz
Bytes per second = 176400
Bytes per sample = 4
Bits per sample = 16
[data] (36848784 bytes)
 

Attachments

  • smplfifoplay01.zip
    9.9 KB · Views: 330
I need true FIFO between FT245R and CPLD)

Use a bigger CPLD/FPGA like an Altera MAX device or similar.

I have learned to choose a bigger FPGA device at start and scale down later.
Possibly you could have found this by running more simulations.

What you could do is to add more fifo's and add control to you cpld.

Can you PM me with you mail address so i can send the TB to you !


grtz

ST
 
I wrote simple sample source (read wav / send blocks to FIFO) and there are still noize, by FIFO underrun. I will think later.

Are in and out clocks the same? If they aren't you should use PLL to sync them.
If clocks are not the same then size of FIFO should be "infinite" to handle clock difference.
You also have to wait until FIFO is, let say, more than full (or 75%).

Maybe all this is already taken care of - I did not have any time to look at VHDL.
Very nice and interesting project, though.

Matej
 
hi, thanks for response
>blu_line
I'm thinking to add Cypress small PLCC32 2KB FIFO, to keep VHDL simple and vendor independent, and for generic application.
or do you have idea for adequate device?
>matejS
There are no clock at FT245R side, or software. it just fill FIFO / wait for room available / then fill again. underrun caused by D2XX driver's time management.

The actual application I'm thinking is...

(a)MCU + SD/MMC, CF, IDE player.
MCU read 512bytes block, send to FIFO, repeat.
1024bytes or more FIFO can generate gapless I2S playback.
(b)Ethernet + MCU, passive device like Apple AirPort
When FIFO has room, PC can send 1024bytes UDP/IP packet.
MCU receive and send to FIFO, answer FIFO status. repeat.

In both case, maybe larger FIFO is better, and no "clock" at MCU side. MCU just watch FIFO status.
 
Ver.02 (with FIFO) is running. sounds great.
attached is schematic, and VHDL.
(I remember some howto write VHDL.. little bit organized)

maybe most interesting point is below.
This loop just repeats writing wave data to FIFO from memory.
There are no confusing sound API, handling driver, etc.

//Copy File to Memory
fread(p, len, 1,f);

dwToWrite = 61440;
unsigned long pCounter = 0;

for (count = 0; count < 0xFFFFFFFF; count++)
{
if (pCounter > len) goto loopend;

//Write to FTDI, from Memory.
if (FT_Write(ftHandle, (p+pCounter), dwToWrite, &dwWritten) == FT_OK)
{
if ( dwToWrite == dwWritten)
{//FT_W32_WriteFile OK}
else
{printf("FT_W32_WriteFile TimeOut\n");}
}
else
{
printf("FT_W32_WriteFile Failed\n");
goto loopend;
}
pCounter += dwToWrite;
}
 

Attachments

  • fifo_i2s_v2_sch.zip
    48.2 KB · Views: 339
Hello there,

I have been reading your Koonlab website projects for quiet some time now. I am a newbie to DIYAudio and Pro audio parse.I am starting to design my Audio DAC that would have a SPDI/F input that would enable me to connect my Desktop PC to a stereo amp. I am very interested in your FIFO 2 I2S implementation. I think it is a very smart way of generating I2S format audio that could be fed to my DAC apart from the direct SPDI/F input. I do have a couple of questions that are hindering my progress. I would sincerely appreciate it if you could take some time to answer those.

(1) I do not understand from your photographs and schematic as to what your transport is?? Are you connecting your Desktop PC to the Asynchronous FIFO??

(2) What is the role of the FT245R?? Is this used to get the CD audio stream through the USB to the FIFO??

(3) What do you use the simplfifoplay01.cpp for?? Is this the driver for the FT245R??

If you could just provide an overview of your setup that would be great. Your other works are equally inspiring. I guess I need to start somewhere.

I do appreciate your help.
Thanks,
DF
 
duddface said:
(1) I do not understand from your photographs and schematic as to what your transport is?? Are you connecting your Desktop PC to the Asynchronous FIFO??
(2) What is the role of the FT245R?? Is this used to get the CD audio stream through the USB to the FIFO??
(3) What do you use the simplfifoplay01.cpp for?? Is this the driver for the FT245R??
DF
Hi,
(1) Transport is IBM ThinkPad note PC.
(2) FT245R provides "simple 8 bit parallel, streaming(not perfect continuous)" data output interface for PC.
(3) This source code is WAV file player on PC. It reads WAV file provided as argument, and open FT245R, read WAV PCM data into memory, then writes data stream to FT245R.

Do it step by step.. this project requires knowledges about,
How to handle I2S signal, WAV file format, C language, FT245R handling, VHDL, schematic and board design, debug, etc etc.
And only you can get is "I'm handling I2S direct, not through SPDIF!" DIY satisfaction only:)
 
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