Debugging UCD-style discrete comparator
First, some context regarding what I'm doing now. I have been playing around with a discrete circuit for a UCD amplifier. Not surprisingly, while I could hear sound after a first crappy build on a protoboard, it was extremely distorted. There were many shortcomings in my build, but scoping the gates of the mosfets seemed to indicate they were not driven fully on. So, I'm not even sure what I could hear was "produced" in a class d mode, as opposed to some unintended class a mode. Thus, I decided to study the subcircuits individually.
The gate drivers, assembled on small pcbs with dremeled "islands", seemed to work mostly fine when driving them directly with a switch and resistor.
The comparator seemed to be my main problem. The general schematic is as attached. The crude current source at the top gives out about 1.25mA. Upon varying the input differential voltage, for instance using the potentiometer R10, I do get a transition. However, scoping the outputs (voltmeters M1 and M2 in the schematic), I can see the comparing action is rather less than ideal.
Starting with both outputs near one rail, slowly varying the input voltage, I can see that a first output alone begins transitioning proportionately to the input. When this first output has slewed, say, 2/3 of the way to the opposite rail, there is a discrete jump in both outputs, upon which the first output that was slewing becomes close to the rail and the other output becomes a value in between the rails. Continuing to vary the input voltage, the second output slews proportionately to the expected rail. The whole transition, from both output near the rails to both output near the opposite rails, happens within about a 25 mV range in the input voltage.
I expected a DC offset, but not such a big linear range on both sides of the transition voltage. A priori, this could be fine, but coupling an mp3 player in series with a 22uF NP capacitor accros the inputs yields rectangular only for the bass notes. The remaining music material yields squiggly lines between the discreet near-the-rail states of the output. Obviously, this won't work as a class d modulator.
I tried emitter resistors (47 ohms) in the long-tail pair and the current mirror, various combinations of the transistor pairs using 2N5401/5551 or 2N3904/3906, handmatching the hfe (about 100 for the 5401 and 220 for the 3906) for the input pair and the current mirror transistors, increasing/decreasing output current through R14, providing positive feedback for hysteresis using small caps or resistors from the outputs to the inputs, putting a small ceramic cap accross the inputs to suppress HF oscillation and increasing/decreasing the voltage, but to no avail. While all these changes have an impact on the exact behavior it stays the same overall.
Here are some questions I'm asking myself.
- Is this behaviour to be expected in such a comparator?
-At the beginning, the voltage divider on each inputs did not have the same impedance (two 1k and two 10k). This made the problem worse. So, does such a comparator requires a rather low impedance source?
- Is the problem coming from my use of a comparatively high impedance source (mp3 player)?
- Does this comparator requires a preamp to operate properly as a class d modulator?
- I expect the rather non-ideal layout to cause problems of speed and high-frequency oscillations, but can the breadboard assembly be causing this behaviour?
- Are the squiggly lines in between the two near-the-rail states of the outputs a bandwidth issue with my oscilloscope (I doubt it) or, related to the previous question, an issue of the maximal bandwith attainable on a breadboard?
- Any tips to elucidate the issue?
I have an old 60 Mhz tektronix oscilloscope but can have access to an Siglent SDS1202X-E 200 mhz scope if that can help.
Thank you for any help!
First, some context regarding what I'm doing now. I have been playing around with a discrete circuit for a UCD amplifier. Not surprisingly, while I could hear sound after a first crappy build on a protoboard, it was extremely distorted. There were many shortcomings in my build, but scoping the gates of the mosfets seemed to indicate they were not driven fully on. So, I'm not even sure what I could hear was "produced" in a class d mode, as opposed to some unintended class a mode. Thus, I decided to study the subcircuits individually.
The gate drivers, assembled on small pcbs with dremeled "islands", seemed to work mostly fine when driving them directly with a switch and resistor.
The comparator seemed to be my main problem. The general schematic is as attached. The crude current source at the top gives out about 1.25mA. Upon varying the input differential voltage, for instance using the potentiometer R10, I do get a transition. However, scoping the outputs (voltmeters M1 and M2 in the schematic), I can see the comparing action is rather less than ideal.
Starting with both outputs near one rail, slowly varying the input voltage, I can see that a first output alone begins transitioning proportionately to the input. When this first output has slewed, say, 2/3 of the way to the opposite rail, there is a discrete jump in both outputs, upon which the first output that was slewing becomes close to the rail and the other output becomes a value in between the rails. Continuing to vary the input voltage, the second output slews proportionately to the expected rail. The whole transition, from both output near the rails to both output near the opposite rails, happens within about a 25 mV range in the input voltage.
I expected a DC offset, but not such a big linear range on both sides of the transition voltage. A priori, this could be fine, but coupling an mp3 player in series with a 22uF NP capacitor accros the inputs yields rectangular only for the bass notes. The remaining music material yields squiggly lines between the discreet near-the-rail states of the output. Obviously, this won't work as a class d modulator.
I tried emitter resistors (47 ohms) in the long-tail pair and the current mirror, various combinations of the transistor pairs using 2N5401/5551 or 2N3904/3906, handmatching the hfe (about 100 for the 5401 and 220 for the 3906) for the input pair and the current mirror transistors, increasing/decreasing output current through R14, providing positive feedback for hysteresis using small caps or resistors from the outputs to the inputs, putting a small ceramic cap accross the inputs to suppress HF oscillation and increasing/decreasing the voltage, but to no avail. While all these changes have an impact on the exact behavior it stays the same overall.
Here are some questions I'm asking myself.
- Is this behaviour to be expected in such a comparator?
-At the beginning, the voltage divider on each inputs did not have the same impedance (two 1k and two 10k). This made the problem worse. So, does such a comparator requires a rather low impedance source?
- Is the problem coming from my use of a comparatively high impedance source (mp3 player)?
- Does this comparator requires a preamp to operate properly as a class d modulator?
- I expect the rather non-ideal layout to cause problems of speed and high-frequency oscillations, but can the breadboard assembly be causing this behaviour?
- Are the squiggly lines in between the two near-the-rail states of the outputs a bandwidth issue with my oscilloscope (I doubt it) or, related to the previous question, an issue of the maximal bandwith attainable on a breadboard?
- Any tips to elucidate the issue?
I have an old 60 Mhz tektronix oscilloscope but can have access to an Siglent SDS1202X-E 200 mhz scope if that can help.
Thank you for any help!
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Some update: by continuing messing around with is mentioned in the first post, I managed to obtain a better result. Increasing the voltage seems to increase mostly the region where it transitions quickly. As such, the linear response part, where the input is near one of the rails, becomes proportionately smaller.
Is it possible I am simply seeing the saturation of the inputs on a comparator designed to work on much larger rail voltages?
There are still some RF oscillations that appear from time to time. The waveform really looks like an RC charge and discharge cycle at around 5MHz. At this frequency, I suspect the parasitics of the breadboard to be fully responsible.
So, it seems I have cleared up my problem... Funny enough, it seems that simply writing about it brought me to think about it differently. Onward to the gate drivers!
Is it possible I am simply seeing the saturation of the inputs on a comparator designed to work on much larger rail voltages?
There are still some RF oscillations that appear from time to time. The waveform really looks like an RC charge and discharge cycle at around 5MHz. At this frequency, I suspect the parasitics of the breadboard to be fully responsible.
So, it seems I have cleared up my problem... Funny enough, it seems that simply writing about it brought me to think about it differently. Onward to the gate drivers!
Without behaviour of waveforms for given signal condition with analysis, I'm not really sure what your conclusion is.
Hello Kartino,
I had set up the entire ucd circuit, similar to the Philips application note, with the gate drivers and some extra IRF630 I has lying around. Those are not the best mosfet, I know, but should at least work at low power. However, they where not being turned on and remained in the linear mode.
As the sound was that bad, I decided to study the circuit piece by piece, starting with the comparator. I'm not hearing anything at this point, only looking at the scope.
Btw: Thanks for all the schematic you published here. It's always interesting to have a look at them!
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