Why did my TPA3255 blow up!?
Just wanted to get some pointers on my TPA3255 build. This is what happened:
1. Assembled the PCB, measured all key resistances, all within expected ranges, not shorts anywhere.
2. Power up on the bench PSU 21V for PVDD and 12V for GVDD. There was a very brief 1A draw on the 21V, I initially thought this was the capacitors charging but it might not have been.
3. I measure the DVDD and AVDD outputs - all good 3.30V and 7.77V.
4. Then I measure the output voltages expecting around 10V but nothing. Well, nearly nothing. All the outputs measured around 300mV to GND. I now notice the 21V current draw is below 10mA.
5. I now turn the PSU off and leave the circuit for a while reading the datasheet.
6. About an hour later (enough time for the caps to fully discharge) I turn the PSU back on then I get some magic smoke and full CC mode on both the 21V and 12V. 2.5A for 21V and 0.5A for 12V.
I'm baffled. My circuit looks good and everything went together well. Does anyone have any ideas or can spot any mistakes in my schematic before I go burning through more ICs?
Thanks
Boscoe
PS. If the circuit turns out to be fine, I can donate some PCBs to whoever can help!
Just wanted to get some pointers on my TPA3255 build. This is what happened:
1. Assembled the PCB, measured all key resistances, all within expected ranges, not shorts anywhere.
2. Power up on the bench PSU 21V for PVDD and 12V for GVDD. There was a very brief 1A draw on the 21V, I initially thought this was the capacitors charging but it might not have been.
3. I measure the DVDD and AVDD outputs - all good 3.30V and 7.77V.
4. Then I measure the output voltages expecting around 10V but nothing. Well, nearly nothing. All the outputs measured around 300mV to GND. I now notice the 21V current draw is below 10mA.
5. I now turn the PSU off and leave the circuit for a while reading the datasheet.
6. About an hour later (enough time for the caps to fully discharge) I turn the PSU back on then I get some magic smoke and full CC mode on both the 21V and 12V. 2.5A for 21V and 0.5A for 12V.
I'm baffled. My circuit looks good and everything went together well. Does anyone have any ideas or can spot any mistakes in my schematic before I go burning through more ICs?
Thanks
Boscoe
PS. If the circuit turns out to be fine, I can donate some PCBs to whoever can help!
Last edited:
From the datasheet:
11.2 Powering Up
The TPA3255 does not require a power-up sequence, but it is recommended to hold RESET low for at least
250 ms after PVDD supply voltage is turned ON. The outputs of the H-bridges remain in a high-impedance state
until the gate-drive supply voltage (GVDD_X) and VDD voltages are above the undervoltage protection (UVP)
voltage threshold (see the Electrical Characteristics table of this data sheet). This allows an internal circuit to
charge the external bootstrap capacitors by enabling a weak pulldown of the half-bridge output as well as
initiating a controlled ramp up sequence of the output voltage.
Your Reset pin is connected directly to the DVDD internal LDO regulator.
I think it should be connected to PVDD/VDD(with proper voltage divider) and with time delay network to achieve the time delay of 250ms or more, for the proper powering up of the chip.
Usually VDD is derived from PVDD with DC/DC convertor.
11.2 Powering Up
The TPA3255 does not require a power-up sequence, but it is recommended to hold RESET low for at least
250 ms after PVDD supply voltage is turned ON. The outputs of the H-bridges remain in a high-impedance state
until the gate-drive supply voltage (GVDD_X) and VDD voltages are above the undervoltage protection (UVP)
voltage threshold (see the Electrical Characteristics table of this data sheet). This allows an internal circuit to
charge the external bootstrap capacitors by enabling a weak pulldown of the half-bridge output as well as
initiating a controlled ramp up sequence of the output voltage.
Your Reset pin is connected directly to the DVDD internal LDO regulator.
I think it should be connected to PVDD/VDD(with proper voltage divider) and with time delay network to achieve the time delay of 250ms or more, for the proper powering up of the chip.
Usually VDD is derived from PVDD with DC/DC convertor.
Hi Boscoe,
Not at all sure about what happened to your build, but here's what occured first time I powered-up a TPA3255EMV board: I didn't pay attention to the fact that heads of fixing screws for the TPA heatsink were pressing against copper areas of PCB which were actually high DC potential...no smoke for me as the PSU was set to limit its current to about 0.1A or so... but cost me one TPA3255 IC at that time.
anything similar with your case?
Not at all sure about what happened to your build, but here's what occured first time I powered-up a TPA3255EMV board: I didn't pay attention to the fact that heads of fixing screws for the TPA heatsink were pressing against copper areas of PCB which were actually high DC potential...no smoke for me as the PSU was set to limit its current to about 0.1A or so... but cost me one TPA3255 IC at that time.
anything similar with your case?
There's nothing wrong with having the /RST connected to DVDD. The 3255 is taking care of anything at "boot" even in this configuration.
I'd rather guess a problem with the soldering. You may check the pins with a reverse diode check using a multimeter to see what have failed exactly. Most likely you fried one or more output stages.
Did you tested the amp unloaded? This may lead into oscillation at the outputs resulting in destroyed output stage due to high voltage spikes.
Are all Digital requirements set the right way?
Start, Reset, Fault?
Have you downloaded the Datasheet of that Chip?
And checked your Schematics against the one of the manufacturer?
Are all the caps the right way soldered to the board.. talking about +-
If I look at the datasheet then this shouldn't blow with 21 Volts only..
Just some thoughts
I hope you find the bug..
Regards Chris
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