Lockdown in Belgium is starting to give results - here's my latest design with TPA3255
Boards:
https://sites.google.com/view/dacgear/
- Compact low cost 10x10cm PCB with wide output tracks
- PFFB built in
- Stereo BTL configuration only
- Differential or SE inputs
- Minimized capacitors in signal path, opamps running on +-4.75V with voltage inverter
- Single 53V power supply, 12V and 5V derived with LM5017 step down converter.
- Coilcraft or generic toroid coils can both be used on board.
Boards:
https://sites.google.com/view/dacgear/
Attachments
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Yes, you are right. Previous one I used was buck converter, so it just slipped in. I didn't even check the price to be honest, I got it as a sample. Anyway, there is a connector for external 12V PS, if someone needs it.
See described current path from capacitor to Chip.
The +48V Input ist OK.
But the GND Input hast to be also short as possible and routed directly to the Chip GND
Your GND plane on top layer is connected to the Caps, OK.
But then there are only a few vias near the outline to Connect to the bottom layer.
And after then it is connected to the Chip.
Additional , These GND plane is cutted from the PFFB Feedback signals.
This Part ist also the more critical Part of Signal.
So i would move the PFFB components to Input parts AS Close ad possible
In additional See GND path from capacitor to other GND of Signal Input.
To make it more easy to See, use a pencil (, different colours) and Paint the current path in your Layout.
One time for Power amplifier, one for additional Power (12V)
And a third one for the Input GND.
In additional ... I think your LDO will be very hot.
I dont know the consumption of tpa @12v..
But a voltage drop of about 36V is to much ..
for calculation: Iout x Vdrop -> 3,6W of thermal Power
If the Chip use 100mA @12v
The +48V Input ist OK.
But the GND Input hast to be also short as possible and routed directly to the Chip GND
Your GND plane on top layer is connected to the Caps, OK.
But then there are only a few vias near the outline to Connect to the bottom layer.
And after then it is connected to the Chip.
Additional , These GND plane is cutted from the PFFB Feedback signals.
This Part ist also the more critical Part of Signal.
So i would move the PFFB components to Input parts AS Close ad possible
In additional See GND path from capacitor to other GND of Signal Input.
To make it more easy to See, use a pencil (, different colours) and Paint the current path in your Layout.
One time for Power amplifier, one for additional Power (12V)
And a third one for the Input GND.
In additional ... I think your LDO will be very hot.
I dont know the consumption of tpa @12v..
But a voltage drop of about 36V is to much ..
for calculation: Iout x Vdrop -> 3,6W of thermal Power
If the Chip use 100mA @12v
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That is why I choosed a flybuck regulator in my design delivering +/-12V.
The quality of the pcb-layout will be measurable by carrying out a simple THD-measurement at 1kHz. You will notice much more k2 than TI shows for their reference design. It took me several iterations to be on par with this one.
I hate to admit it, but you are right! I will have to put a thick jumper on top of the top layer, don't see another way.
