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Class D Switching Power Amplifiers and Power D/A conversion

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Old 24th June 2019, 10:49 AM   #1
xpl1c1t is offline xpl1c1t  United States
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Just looking for someone to critique this design i've come up with...

Strategy is basically to have two bipolar supplies with their center tap referenced to the high/low output transistors raw bridge rectified capacitor supply, these +-2.5V supplies power the high and low side drivers for an H-bridge. Mosfet output supply voltage can be tuned up/down to meet the power requirements without changing the driver components. Using low Vth mosfets so the meager +2.5V max Vgs is no problem, RdsON heating will still be very low. MOSFET gates are underdriven to -2.5Vgs to ensure gate charge is quickly removed. A set of schmitt trigger inverters set up the appropriate delays to prevent shoot-through while keeping the bipolar gate driver fed with a fast rising edge and 32mA of source/sink current. ZXTC2061 drivers have a nice beta of ~400 - though I'm thinking of using the CPH5506 but it has such low current gain which could really make life hard for the little CMOS inverter (i guess i could parallel a few of them though)... the CPH has twice as fast rise/fall times than the ZXTC. The bipolar drivers use the unregulated +-3.5V supply, whereas the driver-control ciruitry runs off regulated +-2.5

I borrowed the PWM modulator scheme from the LT1713/1714 app note. Using the LT1394 since it can be configured for 0-3.4V output swing which reduces the ammount of resistance I need to add to the emitters of the differential pairs (1713 is RRIO). Both are biased by current sources/sinks that are fed by the regulated high and low side supplies (concerned about that current loop being weird and large though...). Cascode transistors are followed by a diode in their current path to ensure that the CMOS schmitt inverter dont have their input protection diodes turn on. ADA4177 opamp receives the DC-coupled external input and handles all the OVP duties perfectly.

All parts are simply chosen from the LTSpice catalog for basic simulation purposes - these are not the parts I am planning to use in the design.

Oh yeah, I am planning to low-pass the comparator output and use it as feedback to the ADA4177, filter would have a -3dB of around 50kHz. I am skeptical of using the H-bridge outputs as feedback due to all the phase shift that will be present - class D is inherently linear so feedback isnt absolutely necessary.
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Last edited by xpl1c1t; 24th June 2019 at 11:17 AM.
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Old 24th June 2019, 02:59 PM   #2
nigelwright7557 is offline nigelwright7557  United Kingdom
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Quote:
Originally Posted by xpl1c1t View Post
class D is inherently linear so feedback isnt absolutely necessary.
I found I got a lot of hum without any feedback.
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Old 24th June 2019, 06:23 PM   #3
xpl1c1t is offline xpl1c1t  United States
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I think that the comparator p-p output voltage should be within specification for low distortion, also the triangle wave generator should produce a super clean waveform - easy to inject tons of distortion products without a good triangle (i have built the one from the lt1714 datasheet and it is impressively clean). Dead time is also a mojor source of error- especially when running near max power since the most narrow pulses become increasingly composed of dead time rather than signal time. I think defeating hum is easy if you run <50% max power, have a clean triangle generator, reduce the comparator output to a range within specification for low thd, minimize all signal node impedances, maximize PSRR(good bypassing and part selection) and having good CMRR (differential signals, good bypassing). X7R bypass caps and good regional tantalums and excellent high frequency linear regulators.
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