Hypex SMPS1200 A700

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Hi everyone, I just found on Hypex webshop new SMPS power supply optimized for UCD700. I could not fnd data-sheet and seems that data on a site has been mistakenly taken from SMPS400 datasheet (apart from voltage).

https://www.hypexshop.com/DetailServlet?detailID=3372

Is there anyone from Hypex who could shed bit more light - seems like it might be enough to power 2 (stereo) UCD700's or even multiple UCD400's if voltage could be lowered.

Thanks in advance for any insight!
 
250 Euros without TVA, looks expensive for 1200W power supply WITHOUT PFC, my opinion...

And their power is or 1200 watts or 600W, they are in contradiction...
And what kind of measurement is 400Watts @ 20 Herts?

Indeed there was written wrong information, max. output power is 1500W and 1200W @ 20Hz. This is corrected now....

Hereby the datasheet; http://www.hypex.nl/docs/SMPS1200Ax00 R2 Datasheet.pdf
 
What about DC protection for 2 amps

Hi Jan-Peter, very prompt response - thank you!
Assuming 2 UCD 700s are connected (stereo amp), how would one implement DC speaker protection - based on the data-sheet it seems that connection exists only for one channel ?

Thanks in advance !
 
Hi All,

While we have Hypex representatives on the line.
I would like Hypex to specify, in the datasheet, the maximum external capacitance allowed.

Although you don't need to add other caps than the HV+ output storage on the PSU there will always be people (like me)
adding their favorite caps.

In my case cause I had them already and could squeeze them in...
What happened is, my guess, that the current limit kicks in
(fold back or hic-up) making the start up ramp non monotonic.

See my latest Hypex project:
http://www.diyaudio.com/forums/class-d/170724-hypex-ucd400-ovp-problem.html

Thanks / Mattias
 
This power supply is not regulated, so instability problems can't arise.

A dynamic current limiter preventing hicup mode is claimed, making it able to whitstand overload for some time.

In these circumstances, adding external capacitance is not likely to cause trouble unless the value is really huge (resulting in too long overload at startup).
 
Hi Eva,

I added 2 x 4700uF per rail. See if I get the time to probe it and append some oscillograms.
It gives a hic-up mode impression with a second or so interval.

/ Mattias

I need to add: It does start up eventually. A friend have the same issue although he does not notice it the way I do. He have a uP based VU meter. I have analog with LED backlight and I have to watch the backlighting flash 2 or 3 times every time I switch the power on.

/ Mattias
 
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Then the current limiting timeout is really short, maybe only intended for >20Hz audio. I usually aim for 1 second full current capability before fold-back in the stuff I design.

If you do some reverse engineering, you can find out the type of control circuit used. If it does not use fixed soft-start time, the soft start period can usually be made longer by increasing the value of one capacitor.
 
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Yes, when I looked at the board before I assembled it I remember there was a very standard PWM controller. So it should be quite easy to go from there and locate the SS cap. Fiddling with the current limit directly is more risky since it probably took a lot of testing, including thermal, to get it right.
Even if the SS cap is involved once the current limit trips "hard" making the recovery a bit longer seems OK for what I know. As long as it can be discharged fast enough that is.
Also there are margins in time before the amp boards enable.

Regards / Mattias
 
Yes, when I looked at the board before I assembled it I remember there was a very standard PWM controller. So it should be quite easy to go from there and locate the SS cap. Fiddling with the current limit directly is more risky since it probably took a lot of testing, including thermal, to get it right.
Even if the SS cap is involved once the current limit trips "hard" making the recovery a bit longer seems OK for what I know. As long as it can be discharged fast enough that is.
Also there are margins in time before the amp boards enable.

Regards / Mattias

Hi,
I do not know this "PSU" but from experience I can deduce cke startup circuit is simply a resistor that feeds the chips directly on high-voltage cell. this is not wrong even if the charging time (flashing) depend on the load (including capacitors). problem can occur in off, this circuit is not able to immediately turn off. continuously generates on / off until the cell is discharged (if the chip does not have a high UVLO) (but if have a high UVLO,then can not generate the ramp to the pseudo soft-start):)
A good soft-start (fixed time) with current ceck while start-up, required different technique.:)

Regards
 
Hi All,

While we have Hypex representatives on the line.
I would like Hypex to specify, in the datasheet, the maximum external capacitance allowed.

Although you don't need to add other caps than the HV+ output storage on the PSU there will always be people (like me)
adding their favorite caps.

In my case cause I had them already and could squeeze them in...
What happened is, my guess, that the current limit kicks in
(fold back or hic-up) making the start up ramp non monotonic.

See my latest Hypex project:
http://www.diyaudio.com/forums/class-d/170724-hypex-ucd400-ovp-problem.html

Thanks / Mattias

Hi Mattias,

You don't have to add more caps. The SMPS has a synchronical rectifying...., so our caps are on the primairy side...

If you add too much caps external due to charge current the SMPS will go in current protection.

Jan-Peter
 
Hi Jan-Peter,

Thanks for your reply. I know the main storage is on the primary, regardless of sync rectification or not. I also can assume the thru-put impedance in the PSU powertrain is low.
(The sync FET rectifier adds sink capability preventing rail pumping, and may improve output impedance).
Voltage drop will be corrected by the amps NFB. SO, YOU ARE PROBABLY RIGHT.

Nevertheless, you know how people are. Adding whatever cap they have at hand or can fit in the case.
I had hard times to fit mine in the case but did so anyway....

Therefore adding a note in the datasheet about external caps should save you some questions.

Regards / Mattias
 
Hi Jan-Peter,

Thanks for your reply. I know the main storage is on the primary, regardless of sync rectification or not. I also can assume the thru-put impedance in the PSU powertrain is low.
(The sync FET rectifier adds sink capability preventing rail pumping, and may improve output impedance).
Voltage drop will be corrected by the amps NFB. SO, YOU ARE PROBABLY RIGHT.

Nevertheless, you know how people are. Adding whatever cap they have at hand or can fit in the case.
I had hard times to fit mine in the case but did so anyway....

Therefore adding a note in the datasheet about external caps should save you some questions.

Regards / Mattias

Actually in our experience adding too much caps will not improve sonic performance. Increasing caps is also increasing short peak charge currents, for best sonic performance you don't want to have those small high peak currents in your system.... ;)
 
OK,
Worth a try. Stored energy is proportional to voltage squared....
I'll take the time to test and listen without the caps. Without the extra caps I'll be able to add some clever cooling architecture.
It does run a little bit warmer than I would like it to.

I've still have to figure out the OVP problem though: http://www.diyaudio.com/forums/class-d/170724-hypex-ucd400-ovp-problem.html

Regards / Mattias
 
OK,
Worth a try. Stored energy is proportional to voltage squared....
I'll take the time to test and listen without the caps. Without the extra caps I'll be able to add some clever cooling architecture.
It does run a little bit warmer than I would like it to.

I've still have to figure out the OVP problem though: http://www.diyaudio.com/forums/class-d/170724-hypex-ucd400-ovp-problem.html

Regards / Mattias

Please contact Frank (support (at) hypex (dot) nl), he can advise you...
 
Hi,
I do not know this "PSU" but from experience I can deduce cke startup circuit is simply a resistor that feeds the chips directly on high-voltage cell. this is not wrong even if the charging time (flashing) depend on the load (including capacitors). problem can occur in off, this circuit is not able to immediately turn off. continuously generates on / off until the cell is discharged (if the chip does not have a high UVLO) (but if have a high UVLO,then can not generate the ramp to the pseudo soft-start):)
A good soft-start (fixed time) with current ceck while start-up, required different technique.:)

Regards

Improve your english. We were talking about PWM soft start, not about controller bias supply.
 
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