That probably means that the designers of the LM158/LM258/LM358 used PTAT (proportional to absolute temperature) biasing to make the transconductance of the input differential pair independent of temperature. That helps a lot, but as no PTAT current source is perfect and all transistors have bulk resistances, you will always have some remaining temperature dependence.
About -0.3 %/K when the designers put no effort at all into reducing its temperature dependence. Normally they will try to keep it more or less constant, so my guess would be less than 0.1 %/K. Maybe Scott Wurcer can give you a better answer, as he used to design op-amps for a living.
Yes, that could work. And, depending of the circuit, some of it may cancel. For instance, an inverting stage with similar input- and feedback resistors will be much better than the individual resistor Tc.
Jan
Indeed, unfortulately, TC tracking is the best cancellation we can have. There is no more to dig out.
I have some doubt about tracking.
There are 8 resistors in a row. Each of them tracks with its neighbors. What about the two at the end.
Here comes "centroids" I think.
The -1 gain is made of 4R interleaved with 4R.
The +8 gain is made of R in the middle with 3R on a side and 4R on the other side.
The 0.2 gain asks for two 1:5 dividers.
So R in the middle with 2R on a side and 3R on the other side and 2 unused.
I have some doubt about tracking.
There are 8 resistors in a row. Each of them tracks with its neighbors. What about the two at the end.
Here comes "centroids" I think.
The -1 gain is made of 4R interleaved with 4R.
The +8 gain is made of R in the middle with 3R on a side and 4R on the other side.
The 0.2 gain asks for two 1:5 dividers.
So R in the middle with 2R on a side and 3R on the other side and 2 unused.
Memory IC designers did that in the middle 1970s: an extra couple of rows and columns of memory cells around the external perimeter, so the "lithographic neighborhood" was identical for every live-and-operational cell. Field oxide stress; optical duty cycle; all of those pieces of voodoo that kept fab engineers from sleeping. Then when fuse-enabled redundancy arrived in the early 80s, the redundant cells performed double duty: extra bits AND litho-matching. Two solutions for the price of one.
Yes there is.
The package of 8 resistors is rated 500mW. Derating is from 70℃ 100% to 150℃ 0%
Thanks to this trick.
Rth is 160 ℃/W
Gain drift from corner frequency thermal stabilty.
A drift of a corner frequency does induce a gain drift in band.
At high frequencies this comes from the gain bandwidth product of the op amp not perfectly stable.
The amplitude response can be modelled as in a first order system where
A = A0 (1/ sqrt ( 1 + ( f/f0)^2 ) )
In band, with f << f0
we can consider this as a gain droop
1/2 ( f/f0)^2. This explicits the gain flatness
Now what goes on for a small change of f0
like 0.1%.
Calculus, gives a gain drift: 0.1% ( f/f0)^2
Assuming an op amp with GB 10 MHz.
Closed loop gain 8. Op amp GB thermal stability 0.1%/℃ ( aka 1000ppm/
Corner frequency is 1.25 Mhz.
In band at f = 125 KHz, one decade, we have a gain drift 10ppm/℃.
Based on the OP requirement 0.001 dB ( aka115ppm ), such a gain drift would come from a 11.5 ℃ temperature drift of the op amp.
The same thing occurs at low frequencies because of the thermal stability of the DC blocking capacitor.
The effect of thermal stability of a corner frequency, does come in band at the gain, an effect lessening with a square law ( f/f0)^2.
A drift of a corner frequency does induce a gain drift in band.
At high frequencies this comes from the gain bandwidth product of the op amp not perfectly stable.
The amplitude response can be modelled as in a first order system where
A = A0 (1/ sqrt ( 1 + ( f/f0)^2 ) )
In band, with f << f0
we can consider this as a gain droop
1/2 ( f/f0)^2. This explicits the gain flatness
Now what goes on for a small change of f0
like 0.1%.
Calculus, gives a gain drift: 0.1% ( f/f0)^2
Assuming an op amp with GB 10 MHz.
Closed loop gain 8. Op amp GB thermal stability 0.1%/℃ ( aka 1000ppm/
Corner frequency is 1.25 Mhz.
In band at f = 125 KHz, one decade, we have a gain drift 10ppm/℃.
Based on the OP requirement 0.001 dB ( aka115ppm ), such a gain drift would come from a 11.5 ℃ temperature drift of the op amp.
The same thing occurs at low frequencies because of the thermal stability of the DC blocking capacitor.
The effect of thermal stability of a corner frequency, does come in band at the gain, an effect lessening with a square law ( f/f0)^2.
Referring to posts #44 and 45.
Indeed, Phythagora is welcomed.
To see the effect of the open loop gain on the loop gain, I can write for a non inverting stage with resistors to set the gain g0
g0/g = 1 + g0/G
Where
g is the actual closed loop gain
g0 the expected closed loop gain
G the open loop gain.
This is valid at DC.
This is valid too, at any frequency considering G is a complex number one could derive from the gain, phase plots from the datasheet.
At DC no problem, G is typically over 120dB, so with g0 =8 we have g/g0 better than 8ppm
At hight frequencies, it is not so fine because G is much lower. Assuming GB 10 MHz, at 20 KHz we only have G = 500 which gives
g/g0= 1 - 0.016, so à terrible 16 000ppm.
Here comes Phythagorus, telling this result is wrong.
Indeed, G is not a real number, this gain has typically a phase -90°.
This is consistent with post #44 and confirmed with post #45 where a plot shows phase -90° over frequencies from 100 Hz to 100KHz.
So at 20KHz, actually g/g0 = 1 + j 0.016
from Pythagora this gives 128ppm a totally different story.
All the above is about gain flatness.
To adress gain drift, all the above results have to be multiplied by the accuracy of G
Considering G has TC 0.1%/℃
Gain drift at 20KHz becomes 1ppm /℃
Indeed, Phythagora is welcomed.
To see the effect of the open loop gain on the loop gain, I can write for a non inverting stage with resistors to set the gain g0
g0/g = 1 + g0/G
Where
g is the actual closed loop gain
g0 the expected closed loop gain
G the open loop gain.
This is valid at DC.
This is valid too, at any frequency considering G is a complex number one could derive from the gain, phase plots from the datasheet.
At DC no problem, G is typically over 120dB, so with g0 =8 we have g/g0 better than 8ppm
At hight frequencies, it is not so fine because G is much lower. Assuming GB 10 MHz, at 20 KHz we only have G = 500 which gives
g/g0= 1 - 0.016, so à terrible 16 000ppm.
Here comes Phythagorus, telling this result is wrong.
Indeed, G is not a real number, this gain has typically a phase -90°.
This is consistent with post #44 and confirmed with post #45 where a plot shows phase -90° over frequencies from 100 Hz to 100KHz.
So at 20KHz, actually g/g0 = 1 + j 0.016
from Pythagora this gives 128ppm a totally different story.
All the above is about gain flatness.
To adress gain drift, all the above results have to be multiplied by the accuracy of G
Considering G has TC 0.1%/℃
Gain drift at 20KHz becomes 1ppm /℃
Last edited:
- Status
- This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.