WM8816 Volume/Balance Controller: Request for comments

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Hi all,

I am designing a Volume/Balance controller based on the WM8816 chip. I know there are millions of ready to use designs, with this or similar chips, in this forum (ie https://www.diyaudio.com/forums/analog-line-level/325268-balanced-volume-controller-line-stage.html, https://www.diyaudio.com/forums/ana...-6-input-selector-mdac-attenuator-ir-etc.html or https://www.diyaudio.com/forums/ana...eamp-arduino-remote-volume-input-control.html). But I'm aiming at the simplest possible implementation based on the Typical Application (Figure 5) in the WM8816 datasheet, because I just need SE-SE.

I'm looking for comments and ideas to improve both the design and my (lack of) EasyEDA skills, since this is my first ever PCB "design". So please bear with me.

Digital Volume Balance WM8816 v0.1.png

Thank you so much
 

Attachments

  • Gerber_Digital Volume_Balance WM8816 v0.1_20191010214252.zip
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  • Schematic_Digital Volume_Balance WM8816_SCHEMATICS_20191010213147.pdf
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Using wide short traces from power and ground pins to ceramic decoupling caps is customary to provide less stray inductance on those routes.


Ground-planes are normally used, separate ones for digital and analog joined at single star-grounding point.

Hi

I thought about it yesterday and even tried to add two ground planes, but being my first PCB attempt I couldn’t find the space. Maybe if I put the WM chip on the bottom side I can probably reposition the caps closer to the chip pins. Will try later this weekend.

Thank you!
 
OK, tried my best.

I moved the WM8816 chip to the bottom layer and repositioned all elements. I think caps are much closer to the pins now.

Also created two ground planes, but I was not able to join DGND and AGND planes, auto-router was destroying the join trace all the times. So I created a 0R resistor to function as a GSTAR. It's possibly the worst of the idea :idea:

Here's the updated files:

Photo view:
DIGITAL VOLUME_BALANCE v0.2.png

Wiring top view:
DIGITAL VOLUME_BALANCE v0.2 wiring.png

Wiring bottom view:
DIGITAL VOLUME_BALANCE v0.2 wiring bottom.png

Thank you again for the help.
 

Attachments

  • Gerber_DIGITAL VOLUME_BALANCE_20191012221449.zip
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  • Schematic_Digital Volume_Balance WM8816_SCHEMATICS_20191012221527.pdf
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I am more concerned by how you split the groundplane tbh. This makes no sense whatsoever as shown. You want the analog groundplane under the WM8816 analog section, too. I think you'd best rotate the chip by 180°, so that you get a chance of giving the digital stuff a little corner of its own.

Also, the connection from LMO/RMO to the opamp's inverting inputs should be as short as possible to avoid undue capacitive coupling; perhaps even consider sparing out the groundplane underneath.

Splitting the groundplane under the chip used to be a common recommendation for mixed-signal ICs (like DACs) in the 2000s. Eventually people found that they could actually get better performance out of a non-split groundplane after all, but for something like a WM8816 this should work perfectly fine.

If you have a spot for a 0R resistor already, I would reserve another for a ceramic capacitor next to it.
 
You only need to discriminate in the layout between analog and digital ground, in the schematic they can be the same signal - then all you have to do is provide a narrow neck in the ground-plane as the join point.


Remember the whole point is to keep digital current flows from going near any analog routing. Digital currents are very noisy even if a few mA because they slew in a few nanoseconds.
 
Hi everyone, and thank you again for hand-holding me through the learning process.

Using a 0R resistor will work, otherwise try to look into using a "Net tie" instead.

You only need to discriminate in the layout between analog and digital ground, in the schematic they can be the same signal - then all you have to do is provide a narrow neck in the ground-plane as the join point.

I am more concerned by how you split the groundplane tbh. This makes no sense whatsoever as shown. You want the analog groundplane under the WM8816 analog section, too. I think you'd best rotate the chip by 180°, so that you get a chance of giving the digital stuff a little corner of its own.

OK, I drew what I understand from your words in the attached image.

The WM8816 chip was already in the bottom layer in previous design, because I think it makes positioning the caps a bit easier, so it's actually rotated to make the analog side closer to the opamp. I just drew the ground layer with the small join just in the middle of the chip, but the chip is on the other side, so should I create another ground layer in the bottom side?

Splitting the groundplane under the chip used to be a common recommendation for mixed-signal ICs (like DACs) in the 2000s. Eventually people found that they could actually get better performance out of a non-split groundplane after all, but for something like a WM8816 this should work perfectly fine.
So the alternative would be to have a digital ground in bottom layer (chip layer) and the analog ground in the top layer (opamp)?


Remember the whole point is to keep digital current flows from going near any analog routing. Digital currents are very noisy even if a few mA because they slew in a few nanoseconds.
Noted, thank you

Also, the connection from LMO/RMO to the opamp's inverting inputs should be as short as possible to avoid undue capacitive coupling; perhaps even consider sparing out the groundplane underneath.
I will make sure to position the opamp closer to the chip, moving the data header to the other side.

If you have a spot for a 0R resistor already, I would reserve another for a ceramic capacitor next to it.
Do you mean the join of the planes should also have a capacitor?

Thank you again, sorry for the stupid questions
 

Attachments

  • wm8816-opamp-planes.jpg
    wm8816-opamp-planes.jpg
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OK I repositioned everything, trying to take into account comments above.

Top layer includes the opamp chip, all header and the big(er) cap, and a copper layer.
Bottom layer includes the WM8816 chip and the two smaller caps, plus a copper layer with a H shape trying to make a split between digital and analog areas of the chip. Chip was turned 180 degrees to face the analog side closer to the opamp, and data header is now on the other side as well.

Here's the outcome design. Do you guys see any big issue?

Thank you so much again
 

Attachments

  • DIGITAL VOLUME_BALANCE v0.4.png
    DIGITAL VOLUME_BALANCE v0.4.png
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  • DIGITAL VOLUME_BALANCE v0.4 wiring TOP.png
    DIGITAL VOLUME_BALANCE v0.4 wiring TOP.png
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  • DIGITAL VOLUME_BALANCE v0.4 wiring bottom.png
    DIGITAL VOLUME_BALANCE v0.4 wiring bottom.png
    101.3 KB · Views: 127
Last edited:
OK, changed a little more the ground layers, caps package and repositioned slightly.

Still interested in feedback and suggestions, otherwise I think this v0.5 will be sent to fabrication soon-ish.

Thank you so much
 

Attachments

  • DIGITAL VOLUME_BALANCE v0.5 render top.png
    DIGITAL VOLUME_BALANCE v0.5 render top.png
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  • DIGITAL VOLUME_BALANCE v0.5 render bottom.png
    DIGITAL VOLUME_BALANCE v0.5 render bottom.png
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  • Gerber_DIGITAL VOLUME 0.5_20191022202931.zip
    108.6 KB · Views: 45
  • Schematic_Digital Volume_Balance WM8816_SCHEMATICS_20191022202807.pdf
    41.8 KB · Views: 74
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