ESP P97

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Hi...I have a question, & I think diyaudio forum can help me. Don't you think at the end of the tone control stage a capacitor is needed? I mean before volume control?
 

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I wouldn't be worried about the tone stage. Its DC offset is going to be maybe 50 mV, and in general this is going to be attenuated significantly as a typical volume pot setting is around -40 dB.

The stage I'd actually be worried about is the volume control, as the NE5532 has fairly large input bias current. I would suggest adding 6.8µ caps in series with R112/212. In return you can pretty much leave out C103/203, these are not nearly as critical.
Alternatively, use an opamp with bias current cancellation (LM4562 etc.) or a low-noise FET input part (e.g. OPA2132/34) in this position. Even a classic bipolar with low input bias current (NJM4565, 4560, even a 4558) should work alright - it's not like you're asking for huge amounts of output level, gain or output current here. Even a classic JFET input part may be adequate (e.g. TL072, AD712, TLE2072), but depending on power amp gain and speaker sensitivity might end up a bit on the noisy side.
 
I wouldn't be worried about the tone stage. Its DC offset is going to be maybe 50 mV, and in general this is going to be attenuated significantly as a typical volume pot setting is around -40 dB.

The stage I'd actually be worried about is the volume control, as the NE5532 has fairly large input bias current. I would suggest adding 6.8µ caps in series with R112/212. In return you can pretty much leave out C103/203, these are not nearly as critical.
Alternatively, use an opamp with bias current cancellation (LM4562 etc.) or a low-noise FET input part (e.g. OPA2132/34) in this position. Even a classic bipolar with low input bias current (NJM4565, 4560, even a 4558) should work alright - it's not like you're asking for huge amounts of output level, gain or output current here. Even a classic JFET input part may be adequate (e.g. TL072, AD712, TLE2072), but depending on power amp gain and speaker sensitivity might end up a bit on the noisy side.

In project88 (preamp) Rod says; "if you use ne5532 you may find that the small dc offset voltage at the outputs causes some potentiometer noise. if this occurs, use 10uf electrolytic cap in series with the connections to the balance & volume pot(to the next op-amp stage)."
But in P97 he didn't mention anything about these.
this is the reason of my thread.
Btw thanks for the inputs. I have some genuine ne5532, but i think i should go for tl072.
 
if you don't mind i wish to know another thing.
To block dc offset & to eliminate input bias current problem can i add 2uf film cap before volume & balance control without effecting the performance?
actually i don't want to lose 5532, as you know 072 is inferior to 5532 in comparison of noise characteristic, & it's very hard to get good quality 6.8uf cap here. The size of the 6.8uf capacitor would be another problem.
 
Hello... :( i don't know much about electronics, i need your help. Douglas self in his book 'Small signal audio design' says- "It is never a good idea to have dc flowing through any part of a potentiometer. Feeding a bias current through a wiper to the next stage tends to create more serious noise.
This practice is often acceptable for FET op-amps like Tl072, but it is definitely not a good idea for bipolar op-amps such as the 5532 because bias current is much greater. Therefore AC coupling is essential"
i don't have 6.8uf; but have some good quality 1uf caps & i want to use them in parallel. Can i use them in both side of the volume potentiometer as Douglas self suggest?
i dont know about coupling time constant thing. Do you thing 2uf would be adequate? Help me. :confused:
 
i dont know about coupling time constant thing. Do you thing 2uf would be adequate? Help me. :confused:
A coupling cap is in serie with some resistor R. The time constant is R x C. The corner frequency is 1 / ( 2 x Pi x R x C ), that means, lower frequencies below do not go through while higher frequencies do go through. It is not sharp, this goes gradually. At the corner frequency, signal goes through with a 3 dB attenuation which is 71% amplitude. Much lower 0%, much higher 100%.
This is explained in EE books at "First order system". Read real books, not audio oriented litterature.
What is the "some resistor R" ? : That is the sum of the source impedance ( what feeds the cap ) and the load impedance ( what loads the cap ).
So R x C depends of where you insert the capacitor.
 
A coupling cap is in serie with some resistor R. The time constant is R x C. The corner frequency is 1 / ( 2 x Pi x R x C ), that means, lower frequencies below do not go through while higher frequencies do go through. It is not sharp, this goes gradually. At the corner frequency, signal goes through with a 3 dB attenuation which is 71% amplitude. Much lower 0%, much higher 100%.
This is explained in EE books at "First order system". Read real books, not audio oriented litterature.
What is the "some resistor R" ? : That is the sum of the source impedance ( what feeds the cap ) and the load impedance ( what loads the cap ).
So R x C depends of where you insert the capacitor.

I am not a student of electronics, it is just my hobby & I love it. I do not know which book to read. If possible then please mention some. Off course about basic audio.
Ok now please help me out. I do not have 6.8uf cap, but I have some good quality 1uf caps.
 
i think this time i'll not be wrong :rolleyes:
At the input of non-inverting amp(first stage) i'll add 1uf mkt cap with a low pass filter(1k & 680pf). To avoid high frequency oscillation in every op-amp, across feedback resistor(between inverting input & output) i am going to add a small 15-22pf ceramic cap. Then at the input of the last stage i'll add 3.3uf mkt capacitor(input impedance of the inverting amp is 15k). The corner frequency will be then below 4hz. My lm3886 amp has input capacitor of 2.2uf with 22k Zin. In my view this is good enough. Please correct me if i'm wrong. i welcome further suggestion.
Btw thnks to all :)
 
I think you can have a half-way house by adding a bias resistor to ground to the opamp input, so that pot crackling noise is much smaller. For a 10k pot a 100k resistor to ground will limit crackle to perhaps 20mV(*), rather than risking the opamp hitting the rail as the pot wiper moves over a scratchy zone.


(*) 200nA into 100k


With the tiny bias currents of JFET or CMOS opamps the slew rate of any crackling is far less - its limited by the capacitance of the input and wiper wiring.
 
I think you can have a half-way house by adding a bias resistor to ground to the opamp input, so that pot crackling noise is much smaller. For a 10k pot a 100k resistor to ground will limit crackle to perhaps 20mV(*), rather than risking the opamp hitting the rail as the pot wiper moves over a scratchy zone.


(*) 200nA into 100k


With the tiny bias currents of JFET or CMOS opamps the slew rate of any crackling is far less - its limited by the capacitance of the input and wiper wiring.

Point noted Sir :) But one forum member have suggested to add a capacitor between volume & output gain stage. i already placed a order of 3.3uf caps & tl072, let's see.
To avoid op-amp hitting supply rail i have seen a technique, something like 1meg resistor between output & inverting input(for tone stage only).
 
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Sorry for the late revival of this thread. Actually i am not a student of electronics..this is why i need to know a lot.
I think now i am ready to start this project.
I will not change anything in this circuit.
But i think adding 47pf NPO in the second stage would be good to fight stray capacitance. 47pf because i don't own
oscilloscope & i don't have smaller value NPOs.
Ok...now my question is Tl072 has input offset of 10mV worst case, 3mV typical...input bias current is in the range of several pA. Because of this small bias current Should i eliminate the bias cancellation resistor(100E) of stage two?
Or Else i can keep it. Because later i like to use better
fet & bipolar input op-amp like Opa2134, Ne5532, Lm4562.
what should i do?
i will make this project on proto board.
 

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