Universal FET buffer / preamplifier

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For a long time I was looking for a good supplement for my input selector project (described in this thread) an here it is ;)

An externally hosted image should be here but it was not working when we last tested it.


In the beginning I wanted to make modified Nelson Pass B1 buffer (which sounds quite good in my system) but then I decided to upgrade it a bit to make it more universal. I designed PCB which can be:

  • standalone FET buffer
  • op-amp preamplifier (for example LM4562)
  • op-amp preamplifier with FET output stage
  • op-amp preamplifier with FET output stage in the feedback loop
There is also dc-servo circuit so the output capacitors may be omitted.

Here is the schematic of one channel.
 
Measurements made with my e-mu 0202 shows that the THD+N is less than 0.001% for entire band.
This is how it looks for 1kHz, +-17V supply voltage, 10k load and 1.55V RMS (4.42V Pk-Pk) Vout.

E-mu 0202 loop:
An externally hosted image should be here but it was not working when we last tested it.


Standalone FET buffer:
An externally hosted image should be here but it was not working when we last tested it.


Op-amp preamplifier with FET output stage:
An externally hosted image should be here but it was not working when we last tested it.
 
Measurements made with my e-mu 0202 shows that the THD+N is less than 0.001% for entire band.
This is how it looks for 1kHz, +-17V supply voltage, 10k load and 1.55V RMS (4.42V Pk-Pk) Vout.

E-mu 0202 loop:
An externally hosted image should be here but it was not working when we last tested it.


Standalone FET buffer:
An externally hosted image should be here but it was not working when we last tested it.


Op-amp preamplifier with FET output stage:
An externally hosted image should be here but it was not working when we last tested it.

I'm curious to know what measurement software you are using with your e-mu 0202? Also, how satisfied are you with that measurement solution?
 
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I'm curious to know what measurement software you are using with your e-mu 0202? Also, how satisfied are you with that measurement solution?

In this case I used the ARTA software and I must say I am positively surprised at the accuracy of measurements. Of course it was necessary to calibrate it first.

The manufacturer declares about 0.002% THD+N dostortions for this sound card (-1dB, 1kHz) measured in the loop. It turns out that for -3dB they are slightly lower – 0.0012%.
 
There are two separate grounds for signal and power connected in one point. I'll post more details later.

I have a few PCB layout suggestions that should lower the theoretical hum and noise levels, and reduce the susceptibility to RF (which can be very insidious and can cause changes in sound quality that are difficult to identify and/or fix).

I believe that the one and only point where the signal and power grounds connect together should be at the power supply's smoothing capacitors' ground, and not before there. Otherwise, the common conductor connecting them both to the supply will have voltages induced by the power ground return currents and those voltages will appear back at the input ground reference, which means that they will be arithmetically summed with the input signal! And before someone says, "Oh well the currents will be low-amplitude.", remember that the voltages induced across the conductor's inductance will be proportional to the time-rate-of-change of the current, and so they can be quite large even for small-amplitude currents!

So if you want this to be able to be a stand-alone universal board that might be connected to power supplies for which the user might not have access to the proper star ground point inside the power supply, then I would at least specify that two separate ground-return wires should go all the way to the power supply's external ground connection, and preferably all the way to the smoothing caps' ground.

My other suggestions have to do with enclosed loop areas. Your signal and signal ground paths do not always stay close together. And the same applies to your power rails and grounds.

Whenever there are conductor pairs, any "loop area" (geometric area) that they form will enable any time-varying magnetic field (and therefore any time-varying EM field) to induce a corresponding time-varying current in the loop. See "Faraday's Law", if interested. And then that current will induce corresponding time-varying voltages across any impedances in the loop, which could include the conductors themselves, or, in the case of the signal input/gound pairs, for example, also things like the source impedance and amplifier input impedance (e.g. the resistor from input pin to ground), and those voltages are then arithmetically summed with the input signal. [For inputs, if you ever notice an effect that goes away when the source jacks are open but is there when a resistance or a short (or a source device) is connected across them, then it's probably due to this "enclosed loop-area" problem.

The "received" magnetic or EM field could come from other conductor loops (since every loop can transmit as well as receive), such as power/ground or output/ground conductors, or from the AC power or rectified AC, or from RF in the air, and anything else, EM-wise, that might be around in the air. While it might be tempting to find no problem and conclude that you don't need to worry about it, a good designer will assume that the EM environment could be very different at different locations, and work to minimize the potential for problems.

RF can be very sneaky, and can have almost-unpredictable (for the amateur) effects, because it can (and often will) be rectified by any PN semiconductor junction. Sure, sometimes that might also result in actual AM demodulaion and audible "radio station" output. But even if that's not the case, very bad things can happen, which might be quite subtle, which I consider potentially more problematical. For example, it might produce "only" DC, which, in a complex IC, might "merely" shift the operating points or bias currents of transistor circuits, or create a DC offset somewhere, etc etc etc.

So, in addition to minimizing all enclosed loop areas, there should be actual low-pass RF filters, or at least mounting provisions for them, on each input (which, for RF, would ideally also include the outputs and the power and ground rails, since everything is an "input", for RF). Any filtering should be as close to each active device as possible. (See, for example, Chapter 7 of the free ADI - Analog Dialogue | Op Amp Applications Handbook .)

But let's get back to "enclosed loop area"! I'm not going to point out every suggestion I would give. But I'll try to give at least one or two examples.

Ideally, probably, you could use a a whole PCB layer for each voltage rail and two more layers for signal ground and power ground (and at least another one for signals). But, for this circuit, you could possibly get by with using two halves of one layer for the two rail voltages, and one layer for power ground, possibly with part of that layer sectioned-off for signal ground. So that would only be three layers, which could easily be created by gluing together (after doing all etching and some of the drilling) a two-sided PCB and a one-sided PCB (using very thin PCBs, if possible).

If using only simple DIY PCB-fabrication processes, you would, of course, need to drill relatively-large holes in the single-sided PCB for access to be able to solder on the inner layer, and would need to etch-away the inner layer wherever a wire had to pass through to be connected to only the top and bottom layers, and would need to add trace "stubs" with extra pads next to components that mounted tightly against the top layer if they also needed to be soldered to the top layer. But all of that would be easy-enough. It would also be easy-enough to DIY it with even more layers.

(Just imagine how much simpler and easier a layout would be, if you didn't have to worry about routing power rails and grounds!!)

The next-best method might be to run each of the trace pairs "on top of each other", i.e. on opposite sides of a 2-sided PCB, always overlapping if possible. That might be topologically impossible to do everywhere, but one of the traces of each pair could temporarily switch to the same side as its mate whenever two trace pairs needed to cross.

The next-best approach might be to keep the trace pairs on the same side but run them always as close together as possible. Just as an example, for that case, your signal ground traces on the current PCB layout don't follow the signal traces to the capacitor and to the stuff at the other end of the capacitor, and then to the IC, and they thereby create a large enclosed loop area. if you stay with a two-sided PCB, then you should probably flood the top layer with signal ground, for the entire input section (and with power ground for much of the rest of the board).

Also, depending on how the circuit works, it is often a good idea to also not create loop area between the + and - power rails, which would mean trying to always keep their traces next to each other, and have ground always overlapping them both on the other side of the PCB.

In every case above, you MUST also have every conductor pair's wires enter the board close together, and have the wires twisted tightly together, all the way from end to end. If possible, they should be shielded twisted pairs, with the shield connected to chassis ground at one end only (but probably not on the board). NOTE too that the shield would NEVER carry the ground for the pair inside. Also, they would have to be shielded PAIRS, NOT shielded wires like those used for RCA connectors, where the shield carries the signal ground.

I actually haven't looked at the circuit in detail, or at the decoupling capacitor connections' layout on the PCB. But keeping the traces short is usually very important, especially for the smaller decoupling caps. Also, the smaller decoupling caps should probably NOT be high-quality (i.e. not low-loss, i.e. not low-ESR) types, like film caps or C0G or NPO ceramic caps. Usually X7R ceramic would be better. Otherwise, there is a very serious risk of creating high-frequency resonances, with the low-loss C and the inductances of any nearby electrolytic cap and the traces themselves. [Similarly, it is virtually always a bad idea to parallel or "bypass" a large electrolytic cap with a film cap.]

And regarding WHERE the "other ends" of the decoupling caps connect, you have to really think it through and get it right. For many amplifiers, decoupling caps should connect as directly as possible between each power pin and the load/output ground point. But you have to analyze where the bypass and decoupling currents need to, or should, go. Sometimes it's better to connect directly between the two power pins, for example.

I am sorry to have blathered-on about all of that, for so long.

Cheers,

Tom
 
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