Thanks Mooly, this is the op amp I will be using -
http://docs-europe.origin.electrocomponents.com/webdocs/0c8c/0900766b80c8c8e6.pdf
I believe I can omit that 3K3 resistor now.
And to bring the voltage back to what it was, shall I use a voltage divider network? Is it possible a certain value of Rf will attenuate the signal?
http://docs-europe.origin.electrocomponents.com/webdocs/0c8c/0900766b80c8c8e6.pdf
I believe I can omit that 3K3 resistor now.
And to bring the voltage back to what it was, shall I use a voltage divider network? Is it possible a certain value of Rf will attenuate the signal?
Hi,
an inverting topology allows both gain and attenuation through the amplifier.
Reduce the feedback resistor to 5K and you will get a mono signal ~<each stereo signal.
That might be too low, so use a pot on the output of the opamp and try 7k5. That should give a range of adjustability, if the drivers are the same sensitivity.
an inverting topology allows both gain and attenuation through the amplifier.
Reduce the feedback resistor to 5K and you will get a mono signal ~<each stereo signal.
That might be too low, so use a pot on the output of the opamp and try 7k5. That should give a range of adjustability, if the drivers are the same sensitivity.
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Excellent. I have started on a multisim circuit of the circuit, and everything is working great 
Problems I encountered was that I could not get the 4066 or any other 4 series chip working! I found the ADG412 lurking around in the depths of multisim and that worked straight away. I hope there is no problem using this chip. When the chip is set to 'open switch', there is still a small amount of leakage through which is visible when the scope settings are sensetive enough - is this a problem?
The output is inverted, what is the circuit using an op amp to invert it back (I'm not sure on how to work out the correct resistor values). Out of interest, how do you work out the correct values of resistors in a unity gain inverting buffer? Do the values matter much?
I've attached a screenshot of the circuit for interest sake.
Fullsize http://img41.imageshack.us/img41/8277/multisimscreenshot.png
Problems I encountered was that I could not get the 4066 or any other 4 series chip working! I found the ADG412 lurking around in the depths of multisim and that worked straight away. I hope there is no problem using this chip. When the chip is set to 'open switch', there is still a small amount of leakage through which is visible when the scope settings are sensetive enough - is this a problem?The output is inverted, what is the circuit using an op amp to invert it back (I'm not sure on how to work out the correct resistor values). Out of interest, how do you work out the correct values of resistors in a unity gain inverting buffer? Do the values matter much?
I've attached a screenshot of the circuit for interest sake.
An externally hosted image should be here but it was not working when we last tested it.
Fullsize http://img41.imageshack.us/img41/8277/multisimscreenshot.png
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I have made an inverting stage with 2x 5.1K resistors and it seems to be operating perfectly, are these values acceptible?
An externally hosted image should be here but it was not working when we last tested it.
It seems OK. As with anything you can make it as simple or complex as you want.
You mention leakage. That becomes worse as frequency rises... try it at 20hz... should be virtually non existant. It's caused by capacitive coupling (is all this programmed into your simulation... because this is what happens in reality). Coupling between the legs on the IC package and print on the PCB. Look at my circuit in post #5. That does a couple of things differently.
1. The switch is placed at the inverting input of the opamp. This means that when closed the switch is operating with "no" voltage, signal or otherwise across it. That reduces distortion caused by non linearitys of the FET. It's a small effect... well documented... easy to eliminate.
2. The second FET in my circuit "shunts" the signal to ground when the main switch is open. That totally eliminates breakthrough.
R43 etc isn't needed.
Your inverting circuit last picture is fine, however remember that the input impedance of the virtual earth amp is the resistance of the "feed" into the inverting terminal. So 5K1 is low, but as it's driven via an opamp before is OK. 10K would be a more usual value in practice. Some opamps such as the TLO71, LF351 etc can't drive loads much below 2 to 3 k at full voltage swing.
You mention leakage. That becomes worse as frequency rises... try it at 20hz... should be virtually non existant. It's caused by capacitive coupling (is all this programmed into your simulation... because this is what happens in reality). Coupling between the legs on the IC package and print on the PCB. Look at my circuit in post #5. That does a couple of things differently.
1. The switch is placed at the inverting input of the opamp. This means that when closed the switch is operating with "no" voltage, signal or otherwise across it. That reduces distortion caused by non linearitys of the FET. It's a small effect... well documented... easy to eliminate.
2. The second FET in my circuit "shunts" the signal to ground when the main switch is open. That totally eliminates breakthrough.
R43 etc isn't needed.
Your inverting circuit last picture is fine, however remember that the input impedance of the virtual earth amp is the resistance of the "feed" into the inverting terminal. So 5K1 is low, but as it's driven via an opamp before is OK. 10K would be a more usual value in practice. Some opamps such as the TLO71, LF351 etc can't drive loads much below 2 to 3 k at full voltage swing.
I have uploaded a zip archive to rapidshare, containing two Multisim 10 schematics - one which is the fully working circuit, the second is the same circuit with the correct connectors in place. I have also included the PCB layout of the one with the appropriate connectors, using Ultiboard 10.
10 Channel Preamp Schematics
I have also rendered some prototype 3D images of the preamp mainboard
10 Channel Preamp Schematics
I have also rendered some prototype 3D images of the preamp mainboard
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
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