I'd love to know the changes if you're willing to share them. I'm going to give this version a try.
A simple schematics does not mean that it is simple to build. Quite the opposite.
So before you contemplate to build, you should satify yourself that you fully understand how it works first.
I'll give you some hints.
There are two current sources in the circuit in post #431, one on each rail.
They are each set at ~13mA nominal. The actual value is not critical.
But they have to be identical, and track each other at all times to ~ +/-1µA.
This will then result in output DC drift of ~ +/-3mV.
So how to build 2x CCS of 13mA so that they track each other to 1µA or so ?
That is the design task that simulators won't solve.
We might consider publishing in a separate thread, eventually.
Before that it should first be fully tested, and successfully built by a few others.
So at least in a few months.
And of course the problem can easily be solved with an output coupling cap.
But that was ruled out in the original design brief.
😉
But thanks for the interest,
Patrick
So before you contemplate to build, you should satify yourself that you fully understand how it works first.
I'll give you some hints.
There are two current sources in the circuit in post #431, one on each rail.
They are each set at ~13mA nominal. The actual value is not critical.
But they have to be identical, and track each other at all times to ~ +/-1µA.
This will then result in output DC drift of ~ +/-3mV.
So how to build 2x CCS of 13mA so that they track each other to 1µA or so ?
That is the design task that simulators won't solve.
We might consider publishing in a separate thread, eventually.
Before that it should first be fully tested, and successfully built by a few others.
So at least in a few months.
And of course the problem can easily be solved with an output coupling cap.
But that was ruled out in the original design brief.
😉
But thanks for the interest,
Patrick
If Zen is the name of the game, couldn't you cut #431 down to one CCS (BF862/2SK170V@IDss=~13ma) and (1+n)Vgs-matched ZVN/ZVP pairs (n=number of I/V circuits, if you don't mind matching transistors), buy yourself some PSRR, temperature stability and some programming ports (for say, compensating imperfect SK/SJ pairs, tuning harmonics, or common-mode feedback input in balanced applications) and be just fine for when you break out the towed array sonar to play whale songs?
I have some UTHAIM boards that could probably be wrangled into this service, but I've been learning on BJTs so no MOSFET pairs...
I have some UTHAIM boards that could probably be wrangled into this service, but I've been learning on BJTs so no MOSFET pairs...
besides dc offset, what other measurement result is done? What distortion level is it?
"what other measurement result is done? What distortion level is it?"
Freuqency response, AC gain, DC offset, drift, total bias, 10kHz and 100kHz square waves without Civ, ..., etc.
Distortion is too low for my AP System 1. So it needs to go to someone who has better equipment.
And then it depends on how you emulate the DAC (without actually using a DAC, thus adding another unknown).
But will publish in due course.
Simulation says 0.00033% at 2Vrms, 1kHz, no output load.
This is actually not surprising, if you apply Kirchoff's law to the current conveyor circuit.
Main source of distortion comes from the tracking current sources not tracking each other 100% perfect at HF.
(Especially when hfe not well matched.)
Distortion with say 10k output load will mainly come from the output followers.
Patrick
Freuqency response, AC gain, DC offset, drift, total bias, 10kHz and 100kHz square waves without Civ, ..., etc.
Distortion is too low for my AP System 1. So it needs to go to someone who has better equipment.
And then it depends on how you emulate the DAC (without actually using a DAC, thus adding another unknown).
But will publish in due course.
Simulation says 0.00033% at 2Vrms, 1kHz, no output load.
This is actually not surprising, if you apply Kirchoff's law to the current conveyor circuit.
Main source of distortion comes from the tracking current sources not tracking each other 100% perfect at HF.
(Especially when hfe not well matched.)
Distortion with say 10k output load will mainly come from the output followers.
Patrick
I would like to report that this circuit works like a charm, and I like how it sounds very much! I have a PCM1796 Dac board that comes with an output stage that is based on the circuit that is published in the datasheet (opamp based). With the stock output stage, the dac sounded OK, with good details, but I always get a feeling that there are still plenty of minute details hidden behind a veil, but they just lacked energy / drive to break through the veil and come through, and a low end that is a bit loose. After replacing the output stage with this circuit, the veiled feeling is completely gone, and the overall result is a presentation that is rich in detail without being clinical, very extended and yet well controlled low end.
I would like to thank Papa, Patrick and all others who gave ideas and help in implementing this brilliant I/V circuit.
Best regards
Liu
TDA1541 is current out I recall so it should be fine. Maybe some tweaking, but someone here will help you with the ropes, or maybe it is obvious when you read the NP article.
Yes, ZEN I/V works well with tda1541. You’ll want to refer to the article regarding correct resistor values. I don’t recall where I landed, but I do know it works well with the stock values.