Whic DAC chip to use with a PMD100 filter??

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I have a Cambridge audio S700 DAC which had quite a nice tone, but not the best imaging or separation in the world. These things improve imensely after I did a bit of reclocking but now I want to change the DAC chip..

The S700 uses a CS8412 reviever, PMD100 filter and SAA7350 DAC. I like the PMD100, but the SAA7350 has seen better days, so what would be a good DAC to use in conjunction with the PMD100?? I'd like something which would require a pretty simple output stage, and sound better that the 7350 - Obviously :)

I was thinking of using something along the lines of a PCM1728, but another option would be for me to add a new DAC chip and use an LCaudio Zapfilter for the output stage.

Any Ideas??


I think you might have a problem interfacing a delta-sigma dac like the PCM1728 dac with the PMD100 filter. All of the BB delta-sigma (bitstream-type) dacs, as well as those from Crystal incorporate digital filters internally (to the best of my knowledge...) I would suggest looking at a sign-magnitude (multibit-type) dac instead; BB has a few that would work great for your application. The PCM1704 is their latest and greatest, and will accept 20 or 24 bit data (the PMD100 outputs 20bit, right?) but is only available in a surface-mount package. For digital, this is clearly a benefit, but can be more difficult and tedious to work with. The PCM1702 is a very similar 20bit dac in a DIP package. I would probably choose the PCM63 20bit dac (also in a DIP package), if you can find a couple- it was just recently discontinued by BB. This chip was very popular in commercial dacs with the PMD100 filter, and is still regarded as one of the best chips made (it is only a bit 'outdated' because it will not accept 24bit data, which the PMD100 does not output anyway.)

Unfortunately, all of these dacs output only current, so the output stage may be a bit more complicated than with a dac which outputs voltage, but if you opt for the Zapfilter, that should not be an issue. Otherwise, all you need to add is a simple I/V stage- you can find examples on the Burr-Brown datasheets for the dac chips mentioned above.

Hope this helps, and good luck with your project!:D

More on PMD 100 interface

I second the emotion about BB 63, although now a classic, it is PFG.
Up the bypass caps to internal nodes, ref, offset, etc to much larger values.
As to I/V, I would strongly suggest going passive, or cascoded passive. My favorite is a "looped cascode" feeding a transformer, link below, which is quite a step above the standard opamp I/V shown in databooks.


One can use the above circuit with a bipolar iout DAC such as the BB 1700/1702/1704 or Signetics 1545, by adding a high impedance current source larger than the peak DAC output current to bias the cascode.

[The BB1700 is a dual 18 bit DAC, surprisingly good sounding.] Also, the PMD100 will put out 24 bits, but only with dither disabled.

Reclocking is a very good thing, with a few subtlties here: One cannot register/reclock the bitclock and data lines with a 256fs clock, so the BB 1700/1702/1704, which updates iout on a rising edge of bit_clock after a falling edge of latch_enable, preclude(s) true reclocking at the DAC unless one uses a 512fs clock and divides down to feed the transport.
One can reclock at the input of the PMD 100, where the data is still 1fs, with audible benefits. But is still best to reclock the relevant signal line at the DAC, so the BB63 takes the cake on that one: iout is updated on the negative edge of latch_enable allowing reclocking with a 256fs clock.

Also also, the 8412 loop filter is happier with component values other than the standard databook ones: try 0.22uf and 475 or 499 ohms with a 3300pF cap added from filt pin to ground.

There is no reason why you can't reclock a bit clock running at 256fs with a low jitter 256fs Master clock. You just run the data, bit clock and word clock through some D flip flops which are clocked with the 256fs Master Clock.

The critical thing is to watch the timing at the D flip flops clock in relation to the data inputs.

To get around this I was thinking about using a small FIFO say 16 words by 4 bits in place of the D flip flop. See the "Jitter in DAC" thread for more info on this.

I would say that any of the PCM63/1702/1704 would be fine to use with the PMD100.

Although I have never heard the zap filter I think its a nice design and would go very well with any of these DAC chips. Or you could just build a similar output stage yourself - It will probably work out much cheaper.

What about going the fully balanced route?
Hi everybody,

Thanks for all the ideas!! I think I'll go for either the pcm1704 or the pcm63 (most probably the '63) I had actually been considering something with a transformer output, just out of curiosity, so I might give it a go..

I've also been toying with the idea of building an integrated amplifier with a transformer attenuator - perhaps I could do away with the output transformer and end-up with an integrated DAC-Amp?? Hmm I must think about this. Anybody got any opinions??

I surely miss something ...

Dave said:
There is no reason why you can't reclock a bit clock running at 256fs with a low jitter 256fs Master clock. You just run the data, bit clock and word clock through some D flip flops which are clocked with the 256fs Master Clock.

Excuse me Sirs, but there's something I don't understand - I surely miss something obvious. How can you sample a signal at the sampling frequency ?


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It also important to note that the timing of the master clock in relation to the data is important so that the setup (and possibly the hold time) of the flip flop remain correct.

Also note that this is only required by the PCM63 as they require a low jitter Word Clock. The PCM1704 on the other hand requires a low jitter bit clock and if the above timing conditions are met then it should be possible to just connect the master clock straight into the bit clock pin and leave out the f/fs altogether.
More on DF output timing

Yikes, mea culpa for not posting more details along with such a seemlingly broad statement. Was typing in a hurry as the day job keeps getting in the way of fun...

The PMD100 when in standalone mode, as with many DFs from that era, divides each 8fs output frame into 32 slices. Each frame will be filled with 16, 18, 20 or 24 bit clock pulses corresponding with number of output bits selected. The bitclock and data lines are zero stuffed after the appropriate number of bits. Deglitch goes positive 2 slices prior to bitclock/data cycles, and latch_enable goes negative one slice prior. The idea is for the critical conversion event to happen after a relative period of bit silence. Less uncertainty of "when" if everything has settled down a bit [pun time]. This works for the BB61/63, Analog Devices ladder DAC chips, and Ultra Analog modules. Does not work with BB1700/1702/1704, which convert on a positive edge of the bitclock after a negative edge of the latch_enable. Regardless, the timing of bitclock is, alas, 8 x 32 or 256fs as in the diagram from ftorres, so one would need at least a 512fs clock with correct setup/hold times to register/reclock the bitclock; and feeding a continuous clock in place of bitclock would not work, unless one was extremely lucky...maybe with 16 bit output data, so that every other sample would be zero...

One could also try asynchronous reclocking, with a 1024fs or higher clock, like 45 MHz or higher. Seems a bit whacky at first, but I would take Elso's word that it can be made to work. Probably better for 1fs non-oversampling apps.

The PMD100 does have separate core and i/o power/ground pins for a reason, to provide a lower jitter feed directly to the DAC; so if one is careful, one can register/reclock at the input of the PMD100, use separate, clean, well bypassed core and i/o supplies, and feed directly to BB1700/1702/1704. The bitclock should be short and direct for fast well defined edges, but one can experiment padding/damping the latch_enable and data lines with a 100 ohm to 1kohm series resistor.
I generally prefer sonics with dither set on, and gain scaling set analog or external with no actual scaling.
I would strongly suggest trying a transformer i/v, either passive like the Sowter 8347, or cascoded with a 1:1 SE interstage xfmr like something from Lundahl, Sowter, Audio Note.
The feedback I get from private emails is that jitter reduction, passive i/v, and clean power supplies have more of a positive effect on the sonics than the particular choice of DAC chip or module. The old adage, not what, how. But, I still like the 63...

A transformer atttenuator, such as the Sowter 9335 is a waaaay kewl thing; catch is that it does not like any DC in the primary, so feeding it directly from the cascoded DAC current is not quite the best idea. It might be ok with the 1 mA or so from the BB63, but really needs either an xfmr or a cap to block the DC. Any other reasonably priced sources of such a device that will tolerate a mA or so primary DC?

I did not realise the PMD100 output its bit clock in bursts (like the SM5847) I thought it was continuous like the DF1704/1706.

This would then require a 512fs clock which is getting pretty fast at high sampling rates.

Its interesting that the PMD100 is designed with a low jitter supply layout in mind maybe this explains the reports of better sound compared to the DF1704. The NPC chips also feature "jitter free" operation which I think enables the output to be directly clocked from the system clock. Maybe Burr-Brown need to catch up in this area.

As for I/V conversion I use a common gate MOSFET amplifier - see my site for more details.
I am well aware of the idiosyncratic nature of DF1700 + 1702/63 dacs, I've had the 1702 running in 1Fs mode. It's just that the initial impression I got from wildmonkeysects post was that it was suggesting that the inability to reclock BCLK with MCLK was the general case. What with wclk, fsync, wdsync, lrclk,wsab along with sclk bclk clab all meaning the same thing and not, all at the same time it's easily done. Still, musn't grumble, it's a fair cop guv, I'll come quietly.
I don't know what specific claims are being made for "Asynchronous Reclocking" with higher and higher clock frequencies but jitter removal cannot be one of them. With so many edges validating data it does not matter when the data arrives, it will be waved through. The question is do you want a system that flags up excessive jitter or one that ignores it ?

Hi Brussel Sprout,

How is the S700 to work with - i.e. is there plent of space inside? Also the clock sync - does it send the actual clock signal back to the transport or just the error signal from a phase comparator as with Linn?

Wildmonkeysects, is see you recommend iron and wire for I/V conversion. It's something I've been thinking of trying, so can you tell me in what way a transformer sounds better in this application? I love percussion, and wouldn't want to sacrifice rythmic drive and impact.

Many thanks both.

The S700 is a DAC disguised as an isolation platform with the DAC PCB sitting in the middle of the 'box'. The platform is large but quite slim so there's plenty of room around the sides of the PCB but not much room above.

The DAC outputs the actual clock signal and there's a switch on the back to select wether to use the internal oscillator (synced to the transport) or the clock from the sc8412. The clock is implemented in a bizzar, jittery way though, and benefits from a little tweaking.

Iron for Spartacus

Yes, yes, surprisingly at first, ironically even, I found that decent iron had better PRAT than the standard textbook monolithic opamp i/v topology.
Excellent rendition of acoustic bass and drums, so jazz, world/tribal, space/trance are well served.
What I did notice is that when saturated, ie more DC in the primaries than spec, bass was lumpy and indistinct, kinda like what solid state fans dislike about less than optimal tube topologies.
Surplus UTC iron has worked well for me, but have "heard" of good results with current production Lundahl, whom I forgot to mention a couple of posts ago.

My take on the subjective end is that what we hear as "bass" response is more than steady state frequency response. When a musical event, such as a drum whack happens, low *amplitude* information over a wide frequency range gives us cues as to when, where, and why. Many active stages, with measurably good steady state response will have issues, among others, with thermal tails which will tend to blur the when, where & why. Ok for rap with thumpa thumpa thumpa, but sucks for anything with subtlety and finesse.
A big potted chunk-o-iron will be much less perturbed under dynamic, ie musical, conditions: no thermal tails, low/no supply modulation issues, free ultrasonic filtering and ground isolation.

Thanks for the replys guys.

I've got a PCM/DF1704 DAC sitting around with a fried digital filter. Grafting it onto the output of the PMD100 in the S700 looks like an option to bring it back to life.

As for transformer I/V and gain, well it really does appeal to my lazy side! Knowing little about the practical issues with transformers, I'm guessing the larger the step-up ratio, the less transparent they become. A voltage gain of say 20 that is so simple to implement and completely transparent sounds almost too good to be true.
Not quite too good to be true...

BB PCM 1704s just waiting for a home? That will do just fine...

I suspect the reason we don't see/hear more trannie DACs is lack of familiarity, outside of the comfort zone. We are used to opamps being the universal elixer of audio, and in some cases add a familiar tube for flavoring; instead of starting with the proverbial clean sheet and thinking of what I call a lower entropy solution.

Two paths to iron here:

#1: Completely passive. 50 ohm to 50 K ohm UTC surplus trannies to balanced feed have worked well for me, or something like a Sowter 8347:


Lowish output voltage, so nogo with a "passive" preamp, but most integrateds have suficient voltage gain. Highish output impedance, so careful with interconnects. Hum pickup may be an issue with single ended. High freq rolloff may be an issue with long and/or higher capacitance interconnects.
You might try adding a 0.01 uF to 0.1 uF cap across the 25 ohm primary resistor and eliminating the secondary cap and resistor. As in the kitchen, adjust to taste. Once you get the above dialed in, is the simplest, laziest, lowest futz solution.
A technical quibble, which I believe is outweighed by the subjective performance, is that the DAC wants to see as low an impedance at the iout pin as possible, which is better accomplished with either the traditional active current summing node i/v or:

#2: Looped cascode. An addendum to this post


is that by adding a fet current source between the negative rail and the source terminal at the iout pin of several mA to bias the cascode on, one can use a bipolar current out DAC like the BB 1700/1702/1704. Although the opamp is out of the direct path, keeping the iout node at as close to zero as possible, and passing the signal current out through the drain of the cascode, it still helps to use a good one, like the BB 627. There are a number of interstage trannies to use for iron here, including:


Also, if you want to go full balanced, you can feed a pair of DAC chips with complementary data through a pair of looped cascodes to opposite sides of a load resistor and a balanced tranny.

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