Using the ESI Juli@'s analog section as stand alone usb dac

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Using the ESI Juli@'s analog section as stand alone usb adc

I've been thinking for a while to turn my PCI Juli@ into an usb audio interface. Time to start :nod:

A lot of information on has been published here by 1audio, Greg in Mississipi, SGK and on other boards. Sadly, most of it has been oriented towards using the digital section of the board as a digital transport. So I'll gather in this thread any useful info.

Some reference:
- :: Zobrazi� tému - Analógová èas� ESI Juli@ + I2S
- :: Zobrazi� tému - ESI Juli??

Matters to be adressed:
- Power supply;
- USB interface selection;
- I2S lines;
- DAC configuration (through i2c);
- Auxilliary circuitry (muting, etc.).

-1- Power supply:

There is one connector (J5/J7) providing power from the digital board to the analog board. The power lines are +/-12V, +5V, +3.3V.

The +/-12V are regulated down to +/-9V on the analog board, to power the opamps. There is also a regulator from +12V to 5V for the analog supply to the DAC, the ADC and the analog multiplexers.

The 5V line apparently is used for the digital section of the DAC.

The 3.3V line could be used to power the digital section of the ADC.

J5/J7 pinout:
1,3: +12V
2: +5V
4,5,6,8: 0V
7,9: -12V
10: 3.3V

-2- USB interface

Two main criteria: the interface must be able to do 24bit and duplex transmission. The sample rate is less important to me.

44.1Khz is fine for most uses. For the sake of simplicity, I2S in/out is preferred.

Ready to use interfaces with I2S in and out aren't that common. Minidsp has the usbstreamer and the ministreamer. Diyinhk has an xmos board. And that's pretty much it :(

The diyinhk board has very little info available about it's I2S inputs. So it's either the ministreamer or the usbstreamer from minidsp. The ministreamer uses the adaptive Tenor TE7022L. The usbstreamer uses xmos. That means that while the usbstreamer can do 24/192 in duplex, the ministreamer can only do 24/48 at most in duplex. The usbstreamer's clock operate at around 22-24mhz, the ministreamer at 11-12mhz.

The usbstreamer obviously offers a lot more. However, it also makes things a bit more complicated. Staying with 44.1 or 48 khz, we can fix the ADC at 256fs or 512fs depending on which interface we use. If we allow higher sample rates, then we need to switch it in between 128, 256 and 512fs. We also need to tell roughly the ADC what's the sampling rate (three ranges, <54k, <108k, <216k). This could be done manually with one 4 poles/3 positions switch. One should then be careful to match the computer settings to the analog board settings.

Or we could get a 2:1 frequency divider on bclk and feed it to an arduino as frequency counter and control pins manager. There's a library for it here. But I'm afraid it's outside my comfort zone at this point. :eek:

It's less of a problem with the DAC as it has an "auto mode" that will detect the proper fs. But it's not certain we can use it at this point.

I'm leaning towards using the ministreamer at 44.1/48, setup the ADC in HW and call it a day. But a 24/192 usb soundcard has its appeal. :D

-3- I2S lines

First it should be noted that both the mini and usbstreamer can only operate as master for mclk. It is a good thing that the ADC is hardwired in slave mode.

The relevant lines for the ADC on the J6/J8 connectors are:
3: data out (adc pin 15)
5: lrck (adc pin 13) / shared with dac
7: bick (adc pin 14) / shared with dac
9: mclk (adc pin 17) / shared with dac
13: dfs0 (adc pin 18)
15: dfs1 (adc pin 20)
17: cks0 (adc pin 6)
19: cks1 (adc pin 16)

As noted above, dfs0/1, cks0/1 will have to either hardwired or controlled by microcontroller to provide the proper operating range for the ADC. If the ministreamer is used, all pins would be low. The tables below give the other values.

L L 256fs
L H 128fs
H L 512fs

L L 8kHz<fs<54kHz
L H 54kHz<fs<108kHz
H L 108kHz<fs<216kHz

The relevant lines for the DAC on J6/J8 are:
2: I2C clock (31.25khz) (dac pin 19)
4: I2C data (dac pin 20)
5: lrck (dac pin 17) / shared with adc
7: bick (dac pin 9) / shared with adc
9: mclk (dac pin 10) / shared with adc
1: data1 (dac pin 14)
16: data2 (dac pin 15)
18: data4 (dac pin 13)
20: data3 (dac pin16)

The I2S data lines 2-3-4 are used for monitoring, as shown by this overall schematic. They won't be used anymore.

It's worth noting that the connector doesn't provide return lines... there's either the metal strap connecting the two pcb or the PS connector for that.

-4- DAC I2C config

While the adc can be controlled through hardware pins, the dac needs to be configured by a controller. This could be the most difficult part of the project as I'll have to learn how to program an eeprom.

Some pins of interest first:

- CAD0 (pin 6) and CAD1(pin 21): set together the chip address. On the Juli@, CAD0 is high and CAD1 low.
- ACKSN (pin 7): defines, in conjuction with bith ACKS, if the dac is in auto (ACKSN=L) or manual (ACKSN=H) mode, wrt fs. On the Juli@, ACKSN isn't tied low but as there is a pulldown, it could be either high or low (I don't dare to test the card while powered). Anyway, as long as ACKS=0, the dac will be in manual mode (auto only happens when ACKSN=L and ACKS=1).
- I2C (pin 18): it's high, as the DAC is configured for I2C.
- DIF0 (pin31): if high, sets the input to I2S. It appears H on the Juli@. It's doubled up by a bit serving the same function anyway.

Important bits:

- ACKS: already touched upon above
- SLOW: allows the use of slow or sharp roll-off digital filter. 0 for sharp, 1 for slow.
- DZFE: enable zero detect on the incoming I2S data lines. It possibly controls the analog muting on the board. 0 to disable, 1 to enable. If disabled, the DZF output pins it controls can be set either high or low by the DZFB bit (0 for low, 1 for high). If enable, three registers tied to the three DZF pins allow to allocate the I2S inputs to pins.
- DIF0, DIF1, DIF2 : set the input data mode. For 24bit I2S, DIF2=0, DIF1=1, DIF0=1.
- SMUTE: allows a soft mute. 0=normal operation, 1=muted.
- RSTN: allows a reset without a reinitialization of the registers. 0 to reset, 1 for normal operation.
- PW1, PW2, PW3, PW4: power down of the corresponding dac. 0 for power down, 1 for power up. Could be used to disable the unused dacs 2-3-4.
- DFS0-DFS1: in manual mode, set the sampling speed range.
DFS1 DFS0 Sampling Rate (fs)
0 0 Normal Speed Mode 8kHz~48kHz
0 1 Double Speed Mode 60kHz~96kHz
1 0 Quad Speed Mode 120kHz~192kHz
- DEM0-DEM1: there's a possibility of deemphasis. Not really useful here, can be disabled with DEM0=1 and DEM1=0 (set by default).
- ATTE: 8 registers control digital attenuation. The ATTE bits can disable it, set to 0.
- TDM0-TDM1: sets the dac to tdm mode. Not useful for us, set both to 0 to disable.
- D/P: selects in between PCM and DSD. 0 for PCM.

-5- Auxilliary circuitry:

A power down line exists on the J6/J8 connectors (dac pin 8, adc pin 10, 11 on the connector). Both the adc and the dac need to be reset after startup and after a change in MCLK. A manual reset for the last case should be implemented and an automatic one for the former.

Both the adc and the dac also don't like to be left without a master clock. A missing clock detector should be implemented and PDN used to power down the ICs. See:

Pin 8 of the J6/8 connectors was used to implement a short mute when there was a change in fs. It goes to R36-R38, which are connected to q3. It should be part of the analog muting.

The function of the pin 6 of the same connector isn't quite clear. It goes to a 4K7 resistor (r33) tied to gnd on the analog board.
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Using Asus Xonar ST/STX as a standalone I2S DAC...

This is done since quite long time ago, and it work just exceptional, above any expectations...
Please take a look at the (more than 700 posts) thread here:

When using such approaches for a standalone DAC (computer interfaced), I think it doesn`t matter very much what sort of sound card is used. More important it may be in my opinion, the software driver of the sound card, the digital processing, and the sound quality the digital processing it may provide to that standalone DAC (interfaced to the I2S lines)...
After a look to your thread, I don't think we're doing the same thing. Actually, it appears we're doing the exact opposite.

What I'm going to do is use the existing adc, dac and analog stage of a soundcard and replace the pci interface with an usb one, so that the soundcard can be used outside a desktop computer, from any laptop. The reason I'm doing it is that the Juli@ has extremely good performance for its price, especially on the adc side.

It is made somewhat easy by the fact that this particular soundcard is composed of two pcbs, one for the controller section, one for the audio processing.
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Attaching some useful stuff. Here are the datasheets of the dac, adc and te7022l, as well as the block diagram of the card.


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Bleh, some more problems are appearing.

The ministreamer has two distinct clock domains, one for playback and one for recording. Even if both are set for the same bitdepth and sample rate, the clocks are running independently. On the other hand, the juli@ is using the same clocks for both adc and dac.

I suppose I could use the playback clocks for everything and then pass the data coming from the adc through an asrc in slave mode, clocked by the recording clocks from the ministreamer.

Or add a spdif receiver and transmitter. That would provide isolation in between the pc and the Juli@ but it complicates things quite a bit.

The usbstreamer seems less problematic, as it runs with the same clocks for recording and playback.
In the end, the easiest would be to give the card its own time domain. For that, the src4382-92 seem the best solution as they offer spdif receiver/transmitter and an asrc.

The spdif interfaces would render moot the master-slave problems brought by the minidsp usb interfaces. And the asrc allows the use of a local clock rather than the clocks generated by the te7022l or the xmos.

The project keeps on getting more complex :dunno:
Having a bit of fun with Eagle. It all seems to fit on a 10*8.5cm board.

I'll post schematics later; they need clean up.

The overall config:

- an src4382 or 4392 serves as interface to the outside world. External I/O are made through spdif. The incoming signal is passed through the ASRC. A local 11.288mhz master clock is provided to the src and to the juli@ board, which runs at 24/48 (256fs).
- an arduino nano controls the DAC and the src through I2C. As the src runs at 3.3V, some level shifting has to be performed. The nano is also in charge of pdwn and reset condition as well as analog muting.
- the jumpers network on top is to control the analog mux (74hc4053a). I've no idea how they're setup so I can either tie the control lines to gnd or 5V.
- the board needs two ac inputs, one for 5/3.3v and one for +/-12v. The regs are simple lm7805, 7812, 7912 and 1117-3.3. The big plane on top is 3.3v.

There's one thing that still needs to be addressed and that's the lack of gnd lines on the big connector. It's frankly surprising from ESI's engineers. :confused: There was ample space to use a bigger connector and add some return lines. I think I'll do as they did and provide a metalized hole connected to gnd to strap the board together. Still not too happy about this.


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