Transistor pairing and bootstrapping output lfets

JaredC79

Banned
2015-09-02 4:32 am
NJ
I have a few sketches I'm working on and literally got the small transistors by the 1000 pack to make sure everything pairs correct well with the exception of the output transistors but plan or ordering pnp npn by the 100 pack next. Hfe is used for matching early input stage typically correct with vge and then vgs on the output. HFE is easy with a number of meters available but what's good for vge and vgs? I've see a lfet design with bootstrapped 47uf caps on them. It's a multi layer board so hard to follow the tracing. Looks to be going to the drain. 100 resistor is going to my gate and 1k to the source. Is this a way of compensating for the variances? The lfet needs 50ma per gate if not mistaken.

Any help is great.
 

Jay

Banned
2003-02-11 9:02 am
Jakarta
What you think as a "bootstrap", 47uF, is probably just power supply local bypass?

There are 2 kinds of matching: (1) between paralleled transistors, and (2) positive and negative signal of a push-pull circuit...

Parallel matching of output transistors (MOSFET or BJT) is using Resistors on the Emitter/Source (around 0.5 Ohm), to ensure equal current sharing, or equal timing of turning on and off.

Because N-Channel is usually better than P-Channel MOSFET, sometimes matching is required. For LATFET, there is difference between Cgs (and Cgd) of P-Channel versus N-Channel, so additional small capacitance is added on the N-side to increase its value, so to match with P-side. Depends on the schematic, some people uses capacitance between GS, some between GD, some between both.

Another way to match them is to "slow down" the N-channel (to lower its bandwidth) a bit by using higher gate resistor (e.g. 220 Ohm for P-channel and 330 Ohm for N-channel. These Rs form a low pass filter with the gate capacitance).

Anyhow, if you see cap between BE (of bipolar transistor), it is not for matching purpose.
 

JaredC79

Banned
2015-09-02 4:32 am
NJ
They maybe bridging the source and drain on positive and negative transistors. An r100 is also on the source. They are NHG Pannyies so I don't think they are bipolar. Im having a hassle of a time matching transistors and hoping something like this will minimize the steps. In essence a filter is on the source with extra capacitance on the drain. I've also seen 47uf caps for decoupling. This layout also has some other 47uf caps for decoupling tho. I need a nice meter that goes HFE vgs and vge out of the box - rather not make something when I'm sure it exists and a ton of schematics and DIY stuff is online
 

Jay

Banned
2003-02-11 9:02 am
Jakarta
You have to use standard terminology, such as Vbe instead of Vge, so not to confuse people. BJT (Bipolar Junction Transistor) or bipolar transistors have base (b), collector (c) and emitter (e), while FETs have gate (g), drain (d) and source (s).

When transistors are in parallel (or in an input LTP, etc) they usually need to have equal current. So matching is needed. In FETs, this current is a function of Vgs, and that's why you match the Vgs (not HFE, no such thing). In BJTs, this current is a function of HFE, that's why you match the HFE of the transistors (not Vbe!).

For small bipolar transistors, yes, some multi-meter (DMM) provide the tool to measure HFE. For bigger ones (and also for FETs), I don't think I have seen one. But it is not difficult to build one.

And may be the HFE measurement in DMM is not perfect. Because when you match Vgs or HFE, you want to match them in the voltage and current condition (may be temperature if it's going to be hot) where you want to implement them...
 

JaredC79

Banned
2015-09-02 4:32 am
NJ
For LFets is using a multimeter in diode mode a good enough way of pair output LFETs? I noticed the longer it is on the source the number increases and i guess this is because of capacitance in the source charging up. i literally ordered the smaller bipolar by the 1000 packs and the drivers by the 100s. i imagine as long as they match well at a cool state performance would be somewhat similar minus heat dissipation issues at higher temps. Y'all aren't matching transistors in that much detail?
 

Jay

Banned
2003-02-11 9:02 am
Jakarta
For LFets is using a multimeter in diode mode a good enough way of pair output LFETs? I noticed the longer it is on the source the number increases and i guess this is because of capacitance in the source charging up. i literally ordered the smaller bipolar by the 1000 packs and the drivers by the 100s. i imagine as long as they match well at a cool state performance would be somewhat similar minus heat dissipation issues at higher temps. Y'all aren't matching transistors in that much detail?

Well, may be you are correct that when the LFETs match at low voltage and current (using simple diode test) they may also match at higher current and voltage. May be. Because in my experience, it is hard to find a matched pair using diode test. And because of this difficulty, so why not use the proper method?

BTW, often I simply match transistors "in-situ". Plug in the transistors in the real PCB and measure, and replace and measure.
 

Jay

Banned
2003-02-11 9:02 am
Jakarta
In ur opinion what is the best jig to make to properly match lfets?

I don't know about the "best" jig. If current is the one to match then it is only a simple circuit. You set the Vds (connect single-ended power supply between Drain and Source, the Source is the ground) according to your intended application, e.g. 40V for a common amplifier. You need to have current reading there, e.g. by using a resistor.

Then you need a POT to set Vgs (voltage between Gate and Source). The voltage source can be taken from the same supply, only you need voltage divider to get a few fraction of it (i.e. connect the gate to the mid point of 2 resistors between +V and ground). With zero volt (Vgs=0), there will be no current from D to S. Current will start to conduct around Vgs=0.4V (for LATFET) if I'm not mistaken.

I will try to find the document. There is one from Nelson Pass.
 

JaredC79

Banned
2015-09-02 4:32 am
NJ
I don't know about the "best" jig. If current is the one to match then it is only a simple circuit. You set the Vds (connect single-ended power supply between Drain and Source, the Source is the ground) according to your intended application, e.g. 40V for a common amplifier. You need to have current reading there, e.g. by using a resistor.

Then you need a POT to set Vgs (voltage between Gate and Source). The voltage source can be taken from the same supply, only you need voltage divider to get a few fraction of it (i.e. connect the gate to the mid point of 2 resistors between +V and ground). With zero volt (Vgs=0), there will be no current from D to S. Current will start to conduct around Vgs=0.4V (for LATFET) if I'm not mistaken.

I will try to find the document. There is one from Nelson Pass.

thanks tightening some things up and think i may have something. Since the N channels are always more powerful then the P, in the final stage of output transistors would a 10 ohm resistor paired with a small cap like .1uf or mf be a good way to time them correctly or should i get a high value pot to dial it in with no cap? I ask because i have seen it done on one amp before.