SPICE distortion analysis

[jgedde]

I have a stupid question... I realize that the SPICE distortion analysis is fanciful at best, but if I see an improvement in SPICE's distortion report when I change something, does that generally mean I would see an improvement in real life?

Thanks,
John

 

[linuxguru]

Small changes (0.5-2 dB) in magnitudes of harmonics can be artefacts of rounding, precision, etc.; larger changes are usually real. The way I differentiate between the two is to continue varying the control input (resistor/capacitor value, etc.) in the same direction and see if the harmonic magnitude continues to follow in the same direction (usually a real effect), stays put or reverses (requires further investigation to determine if a local minimum/maximum has been encountered).

 

[gootee]

I would guess so. But a lot might depend on how good your modeling is.

Also, with good modeling, including parasitics and thermal effects, the calculated THD should be closer to reality.

I am only familiar with LTspice. And with that, you do have to make sure that the maximum timestep is set small-enough. You can simultaneously calculate the THD of your input, and make sure that the max timestep is small-enough that the input's THD is extremely small; almost zero for an ideal voltage source; maybe .000003% max.

With LTspice, it's also very important to turn off the data-compression features, in order to get reasonable THD calculations.

 

[revintage]

With LTspice, it's also very important to turn off the data-compression features, in order to get reasonable THD calculations.

That is: .options plotwinsize=0

 

[jan.didden]

That is: .options plotwinsize=0

I also understand that it is important to relate the frequency of the test signal, the simulation time and the FFT number of points to each other for max resolution. Do that wrong, and the results are meaningless, but if you do it right, the results are pretty reliable.

In the LTspice yahoo group files section there are several examples for this.

Jan Didden

 

[PigletsDad]

Depending on your circuit and simulation setup, you may need to put a long settling period into the simulation, so that any startup transients can stabilise.

If you are using a small time step for good simulation accuracy, this can get very tedious.

 

[unclejed613]

ive found that LTSice generally gets pretty close to reality. one thing you might do however is to introduce intentional mismatches in your resistor values, especially in diff amps, current mirrors and any symmetrical VAS or output stages. most resistor tolerances ar either 5% or 10%, so you'll never get a perfect match in real life. same goes for transistor betas, they vary quite a bit. electrolytic caps are usually rated at +20%/-10% tolerance. if you know how to edit the model files, you might want to create mismatched versions of the transistors, by copying the model and slightly changin the beta between models. you would have, for instance, an MJ15024 model with a beta of 75, an MJ15024LO model with a beta of 50, and MJ15024HI model with a beta of 100. for best results, you would choose your models at random, just as you would be picking them at random out of a parts bin.