Potato 74G14 vs Fairchild 74VHC14

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KlipschKid

Banned
2007-08-10 8:54 am
Hi,

Does anyone know about how to optimise a circuit for the faster Potato ? I recently swapped a 74VHC14 for the Potato 74G14 and the sound is substantially worse. It is used to distribute the output of a Crystek 24.576Mhz CCHD-957. Pin1 is the clock input and pin2 feeds the other sides inputs. Their outputs feed R1-R3 / C2-4.

Thanks !

Tom
 
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Instead of using multiple logic gates, why don't you use a fanout clock driver? Let me ask you, what is the pin to pin skew for the 74G14? What is the added jitter? Oh, that's right, they're not published because they're not measured or guaranteed. I wonder why. I would think those would be important characteristics for clock distribution. I suggest you look a little deeper into the PotatoSemi catalog, among others.
 

KlipschKid

Banned
2007-08-10 8:54 am
Hi,

As you can see, I need 3 outputs, and pin-for-pin compatible. I'm not hacking a high-speed pcb circuit. The clock has its own regulator, and that area is a common ground for the digital circuit.

So if changing the RC output isn't going to resolve the problem, I'll go back to the 74vhc14. I was just hoping a faster chip would improve, not degrade, the signal. I assume from your answers that the RC filter is not the problem. Besides, I can only listen to so much Massive Attack...

If you want more info about the DAC, its here :

http://www.diyaudio.com/forums/digital-line-level/224013-384khz-dac-taobao.html#post3250142

Thanks.
 
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Higher speed CMOS logic has, IME, always given rise to PSU noise problems. That's why these days I go for the slowest possible one (usually HC, very occasionally 4000 series) and reduce the supply voltage to 2.5V.

Based on my experience with AD1955 DACs from Taobao, if you don't hack the grounding you'll miss out on the best possible sound.
 
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KlipschKid

Banned
2007-08-10 8:54 am
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Can the CCHD-957 drive three lines, each about 5cm-7cm, into an Altera Cyclone III fpga ? Too much pF right ?

If anyone knows a pin-for-pin replacement for the 74_14 that'll work better, please do tell.

However, a rant if I may : simply saying a buffer is better is not helpful. Yes, it is correct but I didn't ask for a lesson in design. I'm thoroughly fed up with people answering questions that didn't get asked.

You know what ? I think I'm really going to pull the plug on posting here. What's the point ?
 
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No, you need clock fanout or make the thing paralel terminated with single conductor going thu all of these pins and stuck in the terminating resistor, if you want it done propertly.
Otherwise - yes, it can, without any sort of termination etc. Actually you can save on the clock this way and use some of 0.5$ oscillators or SPDIF.
 
Wrong:
___/-----------[ic pin1]
[R]------------[ic pin2]
___\-----------[ic pin3]

Semi-wrong:
/[R]-----------[ic pin1]
-[R]-----------[ic pin2]
\[R]-----------[ic pin3]

Fine:
/[buf]-[R]-----------[ic pin1]
-[buf]-[R]-----------[ic pin2]
\[buf]-[R]-----------[ic pin3]

Better:
[clock fanout]-[R]-----------[ic pin1]
[clock fanout]-[R]-----------[ic pin2]
[clock fanout]-[R]-----------[ic pin3]
^^^^^
[clock fanout in]


Okay:
[buf]-------------------[ic pin1]--------[ic pin2]------------------------[ic pin3]-[R]-[GND]
 
If anyone knows a pin-for-pin replacement for the 74_14 that'll work better, please do tell.

74_04 should do the trick - the same part but without the hysteresis.

You know what ? I think I'm really going to pull the plug on posting here. What's the point ?

I advised against a part with hysteresis, seems I could have also advised against getting hysterical - I mean its just a hobby, what's the point?
 
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