post RMCK divider with the CS8416

[bocka]

Has anybody tried to use a RMCK clock divider to connect a DF1706 (or similar) digital filter to the CS8416? The CS8416 Rev. E errata says that the 128 x fs option for the RMCK is not working correctly for datecodes later than 0415. When using a DF1706 digital filter 256 * fs cannot be used on 192 kHz sampling rates, because this leads to RMCK signals of 49 MHz which is off the specs.

My idea is to use a post RMCK divider by two in order to obtain the 128 * fs RMCK signal. Has anyone tried this before?

 

[Sabas]

The S1 switch watches gives that possibility you. He explains it in the text and the scheme.


http://www.cirrus.com/en/pubs/rdDatasheet/CDB4351_DB3.pdf

😉

 

[bocka]

Hi Sabas,

unfortunately not. The Errata of the CS8416 says:

"Parts with a manufacturing date code of 0415 or after will not output a proper clock on RMCK when the RMCK output frequency is set to be 128*Fs. Parts with a manufacturing date code before 0415 will output a proper clock on RMCK when the RMCK output frequency is set to be 128*Fs. All parts will output a proper clock on RMCK when the RMCK output frequency is set to be 256*Fs."

My part has a date code of 0451, so I'm not able to obtain sampling frequencies higher than 96kHz when using the DF1706...

So I thought about the solution of using a RMCK post divider by two