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Ouput voltage of a triode stage on quiescent state should be zero?

Hi:

I´m new to this forum and I´m taking my first baby steps into this. I´m interested in guitar preamps and I´m learning all the theory first. One of the things that keep me thinking is the expected value of the output voltage of a triode stage in the quiescent state. I'm picturing a simple stage with a cathode with a resistor and capacitor in parallel to get the bias, and on the load side a capacitor to eliminate the DC component and a resistor to get the the voltage in the output. Should the output voltage be zero in this case or is it ok for it to have a little voltage (like 0.0x volts)?. Can anyone point me in the right direction to understand this? Thanks in advance.

Regards
 

Arnulf

Member
2009-02-02 9:41 am
I don't understand what "resistor to get the the voltage in the output" is supposed to be but regarding your main question: quiescent voltage (left side of coupling capacitor) can never be 0V in a class A stage. Output voltage (on the right side of the coupling capacitor) will however always be 0V, assuming DC conditions on the left side.
 
I don't understand what "resistor to get the the voltage in the output" is supposed to be but regarding your main question: quiescent voltage (left side of coupling capacitor) can never be 0V in a class A stage. Output voltage (on the right side of the coupling capacitor) will however always be 0V, assuming DC conditions on the left side.


Thanks for your answer. With resistor on the output I meant this (I hope mi ascii art is good enough :D ):

Vp---| |-----+-- Vo
|
R
|
v

Vp = plate voltage
Vo = output votage
R = resistor (R is supposed to be under the "+")
 
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