I've come up with a possible new topology for the input stage and VAS of an amplifier using opamps well above their normal voltage limits.

Background:

A negative impedance converter (NIC) is an opamp circuit that synthesizes a negative input impedance. In the diagram point A is the where the negative impedance is created.

the input impedance formula is: - R1 * R3 / R2

Here that's - 15k x 10k / 5k = -30k

So I add +30k as R4 to this, creating zero impedance at input - or put another way a current-mode input. With this circuit each milliamp of current at the input gives 40V at the output, and the opamp magically keeps the input at virtual ground.

Note that the opamp inputs are at 30V when the output is hypothetically at 40V - in other words if we can bootstrap or float the opamp supply suitably this circuit only sees a differential of 10V across its terminals for each mA of input current.

Given a real opamp capable of running at +/- 18V, and able to drive to within 3V of each rail, we have 30V of voltage differential available, so this circuit with 3mA input would see point A at 90V and the output at 120V (and similarly for negative swings).

I split R3 into two equal parts to provide a bootstrap voltage that's midpoint between the inputs and output of the opamp, and use zeners and BJTs to bootstrap the supply so it can swing up and down with the signal.

The left hand opamp does the input and loop feedback, the right hand one is the NIC.

Note that the bootstrapping takes a small amount of current from the network, distorting the behaviour slightly. However the first opamp closes a feedback loop around the whole circuit (its the input stage in effect) which re-linearizes this. Driving the current into the negative impedance converter effectively boosts the open loop gain as this integrates the input opamp's voltage signal.

I fiddled around with compensation in an ad-hoc manner, to get the simulation stable and not too horrid on clipping or square waves, but there's lots more fun to be had working on compensation on a breadboarded version I think

The ratio R1+R2 : R2 sets the voltage swing magnification factor of the circuit. This can be tailored to the voltage rails - here 120V = 4 x 30V (where 30V is my opamp signal swing range), so I've used a ratio of 4, ie R1 = 3 * R2.

I've added rudimentary diode input and output protection to the opamp stages, and the high value of the inter-stage resistor allows this to limit currents to safe levels - again experimentation with a breadboarded circuit as to the robustness of the scheme is needed.

The output stage and biasing arrangements are just lashed up as a demo for simulation - for instance voltage limits and secondary breakdown limits are no doubt completely exceeded and there's no thermal compensation! I'm not so interested in comments about these parts of the circuit

But comments on the idea are very welcome!

[PS Some of the images from posts below seem to have vanished recently, I'll include them here:

NIC_plot.png:

NIC_wave.png:

NIC_wave_detail.png:

NIC_scope.png:

Background:

A negative impedance converter (NIC) is an opamp circuit that synthesizes a negative input impedance. In the diagram point A is the where the negative impedance is created.

the input impedance formula is: - R1 * R3 / R2

Here that's - 15k x 10k / 5k = -30k

So I add +30k as R4 to this, creating zero impedance at input - or put another way a current-mode input. With this circuit each milliamp of current at the input gives 40V at the output, and the opamp magically keeps the input at virtual ground.

Note that the opamp inputs are at 30V when the output is hypothetically at 40V - in other words if we can bootstrap or float the opamp supply suitably this circuit only sees a differential of 10V across its terminals for each mA of input current.

Given a real opamp capable of running at +/- 18V, and able to drive to within 3V of each rail, we have 30V of voltage differential available, so this circuit with 3mA input would see point A at 90V and the output at 120V (and similarly for negative swings).

I split R3 into two equal parts to provide a bootstrap voltage that's midpoint between the inputs and output of the opamp, and use zeners and BJTs to bootstrap the supply so it can swing up and down with the signal.

The left hand opamp does the input and loop feedback, the right hand one is the NIC.

Note that the bootstrapping takes a small amount of current from the network, distorting the behaviour slightly. However the first opamp closes a feedback loop around the whole circuit (its the input stage in effect) which re-linearizes this. Driving the current into the negative impedance converter effectively boosts the open loop gain as this integrates the input opamp's voltage signal.

I fiddled around with compensation in an ad-hoc manner, to get the simulation stable and not too horrid on clipping or square waves, but there's lots more fun to be had working on compensation on a breadboarded version I think

The ratio R1+R2 : R2 sets the voltage swing magnification factor of the circuit. This can be tailored to the voltage rails - here 120V = 4 x 30V (where 30V is my opamp signal swing range), so I've used a ratio of 4, ie R1 = 3 * R2.

I've added rudimentary diode input and output protection to the opamp stages, and the high value of the inter-stage resistor allows this to limit currents to safe levels - again experimentation with a breadboarded circuit as to the robustness of the scheme is needed.

The output stage and biasing arrangements are just lashed up as a demo for simulation - for instance voltage limits and secondary breakdown limits are no doubt completely exceeded and there's no thermal compensation! I'm not so interested in comments about these parts of the circuit

But comments on the idea are very welcome!

[PS Some of the images from posts below seem to have vanished recently, I'll include them here:

NIC_plot.png:

NIC_wave.png:

NIC_wave_detail.png:

NIC_scope.png:

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