My new amp design - the Overkill 180

Attached is the schematic fo the first audio amp I've ever designed. It was designed to output 180W into 8 ohms. It is a bit over-elegant incorporating:
1) a DC servo (not really needed, bt I want to experiment).
2) Optically isolated analog telemetry to a MCU based supervisor, controller, and SOA monitor on another board.
3) Complementary "Slone style" input stage and VAS.
4) Matched pair transistors.
5) Cascode current sources to get the highest open loop gain reasonable.
6) High open loop gain, with lots of feedback (I'm not a believer in the ultra-linear, low negative feedback approach)
7) Output relay contacts included in the feedback loop to maximize DF (again overkill).
8) Bipolar output stage using transistors with integral, thermally tracking bias diodes.
9) Switchable soft-clipping

I design electronics (namely rad-hard PWM motor controllers) for space applications (Current and previous Mars missions and much more) so class D is more my forte.... And my amplifier doesn't use any 5962R... or JANSR components! Just kidding...

The design attached simulates wonderfully in PSPICE. Now I'd like to see if it passes muster with the experts.

I haven't built it yet, nor have I even started the PCB layout. I'm hoping to incorporate input from the group before I move on.

Please let me know what you think. What I did right? What I did wrong? And most importantly, what did I do so wrong that will make it not work!

Cheers!
john
 

Attachments

  • ampsch.pdf
    57.5 KB · Views: 785

GK

Disabled Account
2006-01-08 4:35 am
Hi

I honestly cannot work out how your VAS circuit can work.
The voltages at the emitters (pin 5) of Q15 and Q29 seem to be fixed at ~+/-30.7V (disregarding the output stage bias string) :confused:

Also, you must return the bases of Q20 and Q21 to ground via a resistor, especially of you intend to operate the amp with JP3 open.
 
Thanks for the quick feedback!

I agree with your assessment that the bases of Q20 and 21 need a DC path to ground. I had a resistor there but I must have deleted it by accident...

I need to think about what you're saying about Q15 and Q29. My intent was another current mirror used to achieve translation rom the stages supplied by +/-30 to the stages that get +/-60V. In other words to mirror the current output from the input stage into the same current referenced to the +/-60V rail so I could use the Linear Systems transistors at the input (they won't take 60/120V)

John
 

GK

Disabled Account
2006-01-08 4:35 am
jgedde said:
Thanks for the quick feedback!

I agree with your assessment that the bases of Q20 and 21 need a DC path to ground. I had a resistor there but I must have deleted it by accident...

I need to think about what you're saying about Q15 and Q29. My intent was another current mirror used to achieve translation rom the stages supplied by +/-30 to the stages that get +/-60V. In other words to mirror the current output from the input stage into the same current referenced to the +/-60V rail so I could use the Linear Systems transistors at the input (they won't take 60/120V)

John



Ok, but if you wan't to use a current mirror to perform such a task you need to take the output signal from the collector, not the emitter. Did you accidentally substitute some NPN's for the PNP's in the drawing?
Another thing you need to be wary of is that Slone's published circuit with the complementary long tail pair inputs and current mirror loads is a furphy - it cannot possibly work due to the fact that the VAS standing current is not defined.

Cheers,
Glen
 

GK

Disabled Account
2006-01-08 4:35 am
A few other things:

The temperature coefficient of the diodes in those Thermal Trak transistors differs from that of the B-E junctions by a significant degree. Maybe OK if you are willing to put up with a quiescent current that wanders a bit, biasing the output stage a bit on the hot side to compensate. Larger emitter resistors for the output transistors would likely be required.
Check this thread out for ideas on compensating for the temperature coefficient difference:

http://www.diyaudio.com/forums/showthread.php?s=&threadid=105934&highlight=


Also, WRT the unworkable Slone circuit, it’s inherent flaw has been discussed here in numerous threads (a quick search should pull a few significant links).
For a circuit that allows current mirror loads to be used on complementary LTP inputs, see the schematic here:


http://www.diyaudio.com/forums/showthread.php?postid=1413451#post1413451


Cheers,
Glen
 

homemodder

Disabled Account
2006-05-12 5:36 am
Hi Glen

Ive read some of your threads and seen some of your designs here, youre excellent with transistors.
What is your take on the stochino vas?? Does it have "fighting vas" problems too ?
Have you ever listened to this amp and if so what do you think of it?

Alex
 
Glen,

Thanks again for your input! I indeed transposed the NPN and PNP transistors in the VAS. My PSPICE simulation has them correct.

I will research your concerns about the "furphy" Slone circuit. At this time, I need more understanding as to why it won't work, especially in my incarnation of the topology.

When I have it all worked out, I will post a new schematic with the items in question repaired.

BTW, I had to research the meaning of the word "furphy." I've never heard that word before! It doesn however, fit the bill!

Cheers,
John
 

GK

Disabled Account
2006-01-08 4:35 am
homemodder said:
Hi Glen

Ive read some of your threads and seen some of your designs here, youre excellent with transistors.
What is your take on the stochino vas?? Does it have "fighting vas" problems too ?
Have you ever listened to this amp and if so what do you think of it?

Alex


Thanks for the compliments. I don't have any experience with the Stochino high slewing amp, other than reading the article about it and reading some posts by those who have built is. I’d say it is a pretty unique and sound, fast / low THD / high feedback / repeatable design. I think most that have built it report favourably on its performance.
All symmetrical LTP/VAS topology circuits will suffer from the “fighting VAS” issue to varying degrees, dependant on gain imbalance between the two haves of the circuit and the particular implementation of the VAS and the associated frequency compensation circuitry, which governs the high frequency output impedance and the magnitude of the common mode high frequency currents.
For the Stochino amp, this would require a pretty in depth analysis to quantify, but I think the practical results demonstrate that it would be more of an academic concern, rather than a practical one.



jgedde said:
Glen,

Thanks again for your input! I indeed transposed the NPN and PNP transistors in the VAS. My PSPICE simulation has them correct.

I will research your concerns about the "furphy" Slone circuit. At this time, I need more understanding as to why it won't work, especially in my incarnation of the topology.

When I have it all worked out, I will post a new schematic with the items in question repaired.

BTW, I had to research the meaning of the word "furphy." I've never heard that word before! It doesn however, fit the bill!

Cheers,
John


No worries. I look forward to the corrected schematic – you may have actually come up with another way to circumvent the flaw of the Slone circuit.

WRT to “furphy”, from Wipipedia:

A furphy, also commonly spelt furfie, is Australian slang for a rumour, or an erroneous or improbable story.


That’s a bit restrictive – it also applies to erroneous concepts or ideas (like symmetrical amplifier tropologies that do not have any means of defining / fixing the quiescent voltage (WRT the supply rails) at the base of the VAS transistors) :)


jgedde said:
Glen,

Can you repost http://users.picknowl.com.au/~glenk/CLASSA.gif ?
I'd like to study how you made the complentary topology work...


The link I gave should have gone right to the schematic which was the same (I presume) as that one.

Cheers,
Glen
 
Glen,

I now fully understand the issues with the Slone complementary input stage. I am able to simulate the "real life" behavior by changing the transistor models in my input stage to introduce an intentional mismatch.

The addition of your operating point enforcement circuit fixes the problem!!! Using an extension of the circuit to make the input's current source is brilliant (as is your entire concept).

I'm sure I speak for many who wholeheartedly thanks you for posting your circuit when you could have easily "kept it under your hat." Especially since, without your input, I would have gone ahead and laid out a PCB, bought parts, and built a "furphy."

I'm reposting your circuit for convenience to other readers...

BTW, who is that in your profile picture? Wawaweewa!

Thanks,
John
 

Attachments

  • 12w.jpg
    12w.jpg
    94.8 KB · Views: 720

GK

Disabled Account
2006-01-08 4:35 am
jgedde said:
Glen,

I now fully understand the issues with the Slone complementary input stage. I am able to simulate the "real life" behavior by changing the transistor models in my input stage to introduce an intentional mismatch.

The addition of your operating point enforcement circuit fixes the problem!!! Using an extension of the circuit to make the input's current source is brilliant (as is your entire concept).

I'm sure I speak for many who wholeheartedly thanks you for posting your circuit when you could have easily "kept it under your hat." Especially since, without your input, I would have gone ahead and laid out a PCB, bought parts, and built a "furphy."

I'm reposting your circuit for convenience to other readers...

BTW, who is that in your profile picture? Wawaweewa!

Thanks,
John


No worries. :)
I'm sure that Randy Slone circuit has caused a lot a experimenters grief with continually poofing VAS transistors.
Good luck with the revised design.
It's Actress Rachel Weisz in the avatar.

Cheers,
Glen