This is something that has been in the back of my mind for ages, but it was the thread a while ago about someone selling very expensive op-amps potted in copper tubes that prompted me to actually have a go at it...
The idea is to create a discrete op-amp small enough to directly replace a DIP8 IC op-amp, ideally surpassing the performance of one of similar cost (materials cost is ~£7 for a one-off, plus a few hours work). What has put me off trying before is the fact that to keep the footprint small enough it needs to be constructed entirely from SMT components, which are a pain to solder by hand.
For the first attempt I wanted to keep it as minimalistic as possible to ensure that the size target was reachable. The resulting schematic is attached (shown in a non-inverting configuration). It is a standard 3-stage topology with absolutely no components not essential to operation. Ten components in total (Q1 and Q2 are a monolithic current mirror in a SOT143 package).
The input stage uses SST113 JFETs, which need to be matched (unfortunately I couldn't find any SMT dual JFETs) with a constant current diode in the tail and loaded with a current mirror. The current mirror has no degeneration resistors to reduce the component count by two. This means increased DC offset even with matched BJTs, so the LTP's degeneration resistors are replaced by a tiny potentiometer, allowing DC offset to be reduced to arbitrarily low levels.
The Vas uses a MOSFET (ZVP3306F) to present a high impedance to the input stage. It too is biased by a constant current diode. Dominant pole compensation encompasses the output stage rather than being taken from Vas output, which necessitates a larger value of capacitor and therefore lower slew rate and bandwidth but greatly reduced distortion, especially at higher frequencies.
The output stage is a complementary JFET source-follower, which is just about the simplest output stage possible.
The idea is to create a discrete op-amp small enough to directly replace a DIP8 IC op-amp, ideally surpassing the performance of one of similar cost (materials cost is ~£7 for a one-off, plus a few hours work). What has put me off trying before is the fact that to keep the footprint small enough it needs to be constructed entirely from SMT components, which are a pain to solder by hand.
For the first attempt I wanted to keep it as minimalistic as possible to ensure that the size target was reachable. The resulting schematic is attached (shown in a non-inverting configuration). It is a standard 3-stage topology with absolutely no components not essential to operation. Ten components in total (Q1 and Q2 are a monolithic current mirror in a SOT143 package).
The input stage uses SST113 JFETs, which need to be matched (unfortunately I couldn't find any SMT dual JFETs) with a constant current diode in the tail and loaded with a current mirror. The current mirror has no degeneration resistors to reduce the component count by two. This means increased DC offset even with matched BJTs, so the LTP's degeneration resistors are replaced by a tiny potentiometer, allowing DC offset to be reduced to arbitrarily low levels.
The Vas uses a MOSFET (ZVP3306F) to present a high impedance to the input stage. It too is biased by a constant current diode. Dominant pole compensation encompasses the output stage rather than being taken from Vas output, which necessitates a larger value of capacitor and therefore lower slew rate and bandwidth but greatly reduced distortion, especially at higher frequencies.
The output stage is a complementary JFET source-follower, which is just about the simplest output stage possible.