Kulish Corrector for Class-A EF O/P Stage

linuxguru

Member
2007-09-21 6:28 am
I have done some preliminary simulations for the following topology, which develops further on the Mikhail Kulish error-correction scheme from these diyAudio threads:

http://www.diyaudio.com/forums/showthread.php?postid=1277614#post1277614
http://www.diyaudio.com/forums/showthread.php?postid=856982#post856982

It is possible without much optimization to get THD of around <0.01% (2HD, 3HD components are both around -80 dB) in this voltage follower *without global negative feedback*.

The circuit as shown can deliver 14W into 8R with THD <0.01% at 20 kHz. There's no particular difficulty in:

1) Increasing the rail voltages to obtain higher power.
2) Paralleling more output devices.
3) Adding additional darlington stages to the Kulish error-corrector to drop the open-loop THD even further, maybe below the noise floor.
4) Driving the voltage follower stage with a high-quality op-amp like the LME49710, closing the global feeback loop and dropping the THD to maybe below 0.0001%.

Here's the schematic for the open-loop voltage-follower stage, extracted from LTspice:
 

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linuxguru

Member
2007-09-21 6:28 am
The 1.04k resistor can be realized as a 1k resistor in series with 39R, and the 156R resistor can be realized as a 100R in series with a 56R. All LTSpice transistor models have been obtained from files previously posted at here at diyAudio.

The key property behind the Kulish error-corrector that allows it to be used in this topology is that when the load is attached at the collector of the transistor, it behaves as a pure transconductance amplifier - there is no need to recalculate the collector load resistances (1.04k and 156R in the example shown) to take into account the additional load from a later stage. The gain of each stage may drop, but the distortion figures remain more or less the same.

The second property is that the two emitter resistors in each stage of a Kulish error-corrector need not be the same - this simplifies biasing requirements when used in a multistage topology.

The third property (unused in this example) is that additional transistors (triple-, quadruple-darlington, etc.) can be added to each stage of the Kulish error-corrector to linearize it even further. The collector loads follow the multiplier sequence 1, 1.039..., 1.079..., ... (1.039)^k etc.

An additional property (unused in this example) is that it is possible to tap the emitter of the topmost transistor in each Kulish stage, losing some linearity (additional distortion), but getting a low-impedance output in exchange.

Here's the LTSpice .asc file (rename it to <something>.asc before loading it in LTSpice):
 

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linuxguru

Member
2007-09-21 6:28 am
Here is the LTSpice schematic file of the Class-A CFP voltage follower (rename to <something>.asc before loading it in LTSpice). It's tolerant of a fairly wide range of supply voltages starting at about +/- 15V, but the higher the rails, the greater the power dissipation in the output stage:
 

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linuxguru

Member
2007-09-21 6:28 am
> you're talking of a 4% adjustment to r1 &4.

Yup - it approximately corresponds to the ratio Vt/Vbe = 26 mV/660 mV = ~3.9%

> Are the resistor values that critical to circuit operation?

The critical resistors are R1 & R4 above - these can be fixed after choosing
the other three in each corrector section. The other values are not critical,
they can be chosen for biasing convenience. If you vary R1 (& R4) and watch
the FFT plot, you will observe H2 and H3 decrease for a while and then start increasing - that minimum is the sweet spot (which varies depending on the
value chosen for the Vbe servo). Alternatively, fix R1 & R4 approximately
and vary the voltage of the Vbe servo to find a sweet spot that minimizes H2 and H3.

The ratio of H2 to H3 can also be altered by adjusting the value of the emitter ballast resistor in the output transistor. Generally, less seems to be better, but that will make DC bias stability harder to obtain. I've show 0.1R in the simulation, but practical designs should probably go with 0.47R and accept the higher distortion that results at large swings. In any event, GNFB will be required to remove DC offset at the output, and this will also help drop the H2/H3 and higher harmonic components (already almost non-existent) below the noise floor.

The distortion also becomes vanishingly small at smaller swings - say 1V peak. In this respect, the circuit seems to mimic the behaviour of the original classic JLH, but with better distortion numbers. For normal indoor listening levels, distortion may not even be measurable.

> Does it work in ClassAB or only as a ClassA stage?

It will work in Class AB also, but the kink in the curve during the transitions seems to mess up the distortion numbers - it drops back to the -50..-60 dB regime typically seen in uncorrected Class AB stages. Similarly, turn-on and turn-off transients also seem to mess up Class B distortion numbers.

I'm looking for a workaround for this, maybe Bromley or Sandeman Class S wrapped around this, with this being an accurate Class-A stage.
 
LXG,

Thank you for your work, it is outstanding. :cool:

I too noticed the Kulish work and had thought it amongst the best I've seen. It neatly gets around the EF bugbear - Vbe compressive distortion.

I'm no expert in PSpice, but I'd twigged to the extreme criticality of the tweaking to achieve proper error correction and decided that the added complexity, particularly in light of stability aspects with global feedback, were not worth the trouble for AB. Of course, EC is the subject of Edmond Stuart and Robert Cordell's posts; fascinating work.

Then I figured that an uncorrected Class A would sound damn good anyway, had built and auditioned them and then realised that EC was probably a concept better suited for laser trimmed chips, but not for discrete.

The transient response is very, very good - impressive getting all those devices to sing in tune!

It would seem that the CFP approach, whilst elegant and simpler, still must contend with that switching instability in Class AB. This is a well known issue for CFP. I have found they they only work well in Class A, though they can be tamed with careful layout and a little lag comp.

If it is true that the best approach with amplifiers is to make all stages linear as possible, then apply global feedback, would not efforts best be spent on the voltage amplifier? ;)

Thank you again, food for thought.....

Hugh
 

linuxguru

Member
2007-09-21 6:28 am
> Thank you for your work, it is outstanding.
> Cheers for that.
> Nice work

Thanks for the kind compliments... <takes deep bow>. The key element
of genius here, however, belongs to Mikhail Kulish and his very original
and brilliant adaption of the Darlington for accurate small-signal
voltage amplification. His circuit ranks with the LTP, Darlington,
Sziklai and Current-mirror as among the most fundamental building
blocks with two transistors. It still boggles my mind that this invention
took place over 50 years following the invention of the transistor!

I will, however, take credit for spotting the potential to extend the
circuit for some very practical use, in particular as a very highly
linear voltage follower/current gain stage.

> It neatly gets around the EF bugbear - Vbe compressive distortion.

Exactly. On another plane, it also allows us to use very primitive
non-linear amplification devices (say, home-brewed transistors
or products of a third-world manufacturing infrastructure, maybe
with a hfe =~ 50) and make a compound device that exceeds
the specifications of the finest 1st world semiconductor
manufacturer - that is the essence of Russian genius.

> I'm no expert in PSpice

I'd second the recommendation of Andy_C and many others on this forum
to start out with the free version of LTSpice/SwitcherCAD. It was really
painless to set up and start simulating discrete circuits with it. There's
also a lot of online fora to get help on it.

> EC was probably a concept better suited for laser trimmed chips, but not for discrete.

Generally very true - but this one seems simple enough even for a garage
tweaker of discrete circuits.

> impressive getting all those devices to sing in tune!

It's helped along a great deal by the hfe linearity of the Toshiba output
devices - it may not have been possible 20 years ago.

> would not efforts best be spent on the voltage amplifier?

For the sonics, certainly. There's far more to be gained there by
tweaking compensation, VAS & LTP characteristics, etc.
Perhaps the best approach is to use an ultra-linear voltage follower
as the output stage and forget about its sonics - and reserve the
sonic tweaking for the earlier, small-signal stages.

> what do you think about this comment?

You can certainly improve the basic emitter-follower by using a CCS to
supply emitter current. However, unless it is driving a very high impedance
load, it will show Vbe distortion due to the current swing in the load,
which causes the current through the emitter to vary, and hence Vbe
to vary.

It is in this very respect that the Kulish is superior to the emitter follower -
changing the load at the corrected collector output of the Kulish alters
the voltage gain, but not the distortion characteristics. It is a pure
transconductance amplifier in this regard. This allows us to use the
Kulish as a building block in a multi-stage circuit, and obtain further
current gain through a pure current amplifier, e.g. a constant-hfe BJT.
 

KSTR

Member
Paid Member
2007-07-17 2:35 am
Central Berlin, Germany
Hi Dave,

In LXG's first post there are the links you are after. In one thread Mr.Kulish himself gave further comment and data, additional to what Mr.Nikitin has written.

This :cool:-ish thing looks quite nice for a voltage output LTP.

I now simmed a basic Kulish stage (without a lot of tweaking, but I found interesting insights, plotting DC transfer slopes with varying parameters), gain=30, Vs=60V, Vin=200mV(p), the results are really worth further investigation:

Code:
Freq.	THD
20Hz	0.000297%
200Hz	0.000328%
2kHz	0.001433%
20kHz	0.014027%

Details on the 20kHz data:
Code:
Harm.#	Rel.Level	Phase
1	1.000e+00	0.00°
2   	1.392e-04	-180.94°
3	1.675e-05	-281.86°
4	2.138e-06	-358.77°
5	2.871e-07	-95.33°
6	4.273e-08	-183.83°
7	8.315e-09	-248.46°

H2 is dominating the picture, hence a differential stage (into differential outputs) would significantly reduce THD at 20kHz by one order of magnitude. And the odd harmonics are going down quickly with order which is very nice, too.


Thank you, Linuxguru, for bringing this interesting topic back on table.

Regards, Klaus
 

linuxguru

Member
2007-09-21 6:28 am
> do you have a reference for the Mikhail Kulish work ?

It was published in a Russian DIY/trade journal called 'Radio' in 12/2005.
The first page of the article can be downloaded here:

http://www.diyaudio.com/forums/showthread.php?postid=856990#post856990

You'll need a djvu/djview reader to read it, and it's in Russian. The remaining
three pages are further down in the thread, but I could not read them even
with djvu-libre in Linux - it's missing something that's mandatory to render
it correctly.

> I was wodering if this koolish unit can be applied to LTP

My thoughts also - it can be used to replace JFET LTPs to obtain a highly
linear transconductance amp that can then drive a folded cascode or similar
common-base stage.

I haven't simulated that yet, but I see no difficulty in principle.

Edit: Klaus, my pleasure. How do you easily read the FFT phase information in LTSpice? That H2 phase reversal of exactly pi is certainly interesting...
 

KSTR

Member
Paid Member
2007-07-17 2:35 am
Central Berlin, Germany
linuxguru said:
Klaus, my pleasure. How do you easily read the FFT phase information in LTSpice? That H2 phase reversal of exactly pi is certainly interesting...
Hi Linuxguru,

You won't see that phase stuff with the FFT feature in the waveform display, but when the FFT is done with the .FOURIER command it lists the phase relationships also -- which I find very useful, especially when you also want apply some means of error correction/cancelling, where you want to know if your distortion is compressive or expansive and what phase shift you need to cancel non-inphase/-counterphase signals.

I forgot to add the circuit I simmed, for reference (now please find it attached). I plotted transfer slopes with varying parameters and surprisingly found that the most linear transfer (constant slope) is not found with the textbook ratio of 1.039 but with a somewhat smaller value. Also the outer resistors' (R2, R4) ratio to the inner ones plays an important role as it seems, in my example it is about 0.8. The corresponding curve is the light green one, which the flattest of them all. The factors are 1.008 for the inner collector resistor and 0.8 for the outer to inner ratio.

I could improve the THD20 by a factor of more than 3 by the simple addition of a cap. This could be further reduced a bit (factor 4...5) at a cost of increased THD at LF by further imbalancing the resistor ratios. Right now THD sims in at:
200Hz: 0.000298%
2kHz: 0.000405%
20kHz: 0.004190%

As usual, to be taken with a grain of salt... but then again, any Vce never drop below 13V, so the lack of modelling the Early voltage drop a low Vce should not be too much of an issue.

A disadvantage of this "VAS" is the high supply of 90V (not 60V as I wrote wrongly in the first post). Which worries a little (Vceo of the 2N3904, but actual Vce is almost within limits with that given drive of 200mV). Spice doesn't care, for god's sake...

BTW, fist try on a LTP failed...

Klaus
 

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linuxguru

Member
2007-09-21 6:28 am
Klaus, thx for the info. I too had noticed that one could go a bit lower than the 3.9% in the simulation - probably a load-dependent factor.

> try on a LTP failed...

In what manner did it fail? Hard to bias, or Spice fails to coverge quickly, or is it worse than a conventional LTP under similar bias conditions?

I spent my time simulating a Class-AB emitter follower, simpler than the first one in this thread, with similar distortion numbers at small swings (<4 V). At high swings, it goes to around -55..-60 dB, which is still not too bad.

Here's the schematic:
 

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linuxguru

Member
2007-09-21 6:28 am
And here's the FFT plot at 30V amplitude input (almost rail-to-rail swing), with both output transistors cutting off sharply for almost half the cycle. It's much worse than the small swing case,but still quite usable - GNFB can bring some of this under control:
 

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