Quite possibly. The *short-term* jitter coming from the receiver (eg. CS8412 used in the SDS Labs DAC) will depend mostly on the quality of the PLL, and it's rejection of whatever jitter is coming in from the transport. However, a receiver's PLL must track the incoming clock, and so low frequency jitter is harder to attenuate than high frequency jitter. You can see this in the CS8412 datasheet, which shows that it's PLL's jitter rejection starts rolling off around 25kHz. Additionally, PLLs like this usually cannot produce jitter levels as low as a crystal oscillator. So, there will be some measure of jitter added by the PLL in the receiver chip. Without a reference clock, a PLL's frequency will wander like a drunken sailor, and regardless of reference locking, a PLL's cycle-to-cycle timing consistency (short-term jitter) will never be as good as a clean crystal oscillator.
Now, the jitter level of the transport processor could be quite poor, especially if it is a large VLSI chip with it's own oscillator circuit. Just how this compares to the jitter coming out of the SPDIF receiver is very difficult to say, since it could vary tremendously depending on the design. In any case, adding something like the LClock to the transport processor could go a long way towards fixing the long-term jitter problem (frequency stability). But, due to the nature of large VLSI chips, there may still be significant short-term jitter present in the transport's output. At least it is much easier to get rid of short-term jitter than long-term jitter.
Note that a PLL based receiver like the CS8412 does not use an external crystal / clock, so you can't connect the LClock to it. The only way around this is to use an asynchronous sample rate converter (ASRC) like the AD1896 or CS8420 so that the DAC clock can be independent of the transport clock, but now we're no longer talking about the SDS Labs tube DAC...
I use my setup like this: Feed SM5843 in SDS Labs with LRCK , BCK and DATA from Sony cdp xa 50 es transport (about 15 cm
wires between two chips). 16MHz clock is close the SM5843 and feed the transport with masterclock by pin nr. 9 on the digifilter.Syncro is high. Five wires between cdp and dac .
Was very interesting to know , is there any reason use S/Pdif and CS8412 versus my connection now.
Something else about my dac.
Last weeks I have worked hard with analog stage power supply . For PCM 63 PK analog +-5 proved more expensive LT voltage regulators and changed all caps to the Black Gate. But the most magical result got with four batteries only ! (6V Photo , on the dac chips like decoupling caps) Also went on tube rectifier for HT Amp.7308. All this sounds so great.I didnt believe its possible get from cd-s at all.
For next I´d like prove some single triode (have pair of 6S45P and Raytheon 5842Q )and line OPT-s. My plan is use Lundahl LL1671 30MA for it . Have anybody some experience with this OPT-s ?
A couple of years ago I also found that active regulators is completely disaterous for good sound.
No matter where they are used. I have come to the conclusion that it is because of negative feedback.
If I use them I always have a C-L-C filter at 200Hz at the output and that always sounds much better. The best result I have got is rectifier - capacitor - shuntregulated bipolar transistor - capacitor - shuntregulated mosfet - small foil cap.
A shuntregulated mosfet makes wonder to the sound, but it don't accept gate to drain voltage changes. That's why I use a two stage regulator and the result is very much better than a active regulator or even a passive CLC regulation.
I used a Lundahl transformer (LL1630/10mA if I remember right) in a linestage a couple of years ago. It sounded very good in all areas, but made the bass a sound a little light. Transparency was on par with the best foil caps around (Hovland Musicaps for me). I didn't go to the bottom with this design so it might be possible that the bass lightness can be more full with a different powersupply.