I made Hawksford output error correction and have very low distortion. But I'm not sure how to compensate bias current? I think error correction's transistors (Q9 and Q10) must be mount to same heat sink of output transistors (Q13-Q18) and driver transistors (Q11 and Q12).
How do you think?
How do you think?
Attachments
Hello bimo. You have a good circuit. To check the offset at temperature I need a LTspice model of this circuit.
The Adcom GFA535 has a similar output stage to your circuit. In this the output and driver transistors are on the heatsink along with a thermistor which connects the base to emitter junction of the NPN driver transistor.
The equivalents of your Q9 and Q10 are situated on the pcb fairly close to the heat sink. In case you want to check further I found the service manual for this amplifier on Hi-Fi Engine.
The equivalents of your Q9 and Q10 are situated on the pcb fairly close to the heat sink. In case you want to check further I found the service manual for this amplifier on Hi-Fi Engine.
Hi.
HEC is a great circuit if implemented correctly. I have built it using both mosfets and Darlington BJT's. I found that with Darlington circuit it required both error amplifier devices to be on the heat sink, as both output and drivers are integrated and share the same die temperature. HERE is the Darlington version I did back in 2013 (Gosh, I can't believe it has been that long ago!
) the error amplifiers are TO-126, mounted next to outputs.
The mosfet version does not require both error amplifiers to be mounted to heat sink due to lower Gm at bias current, usually one mounted will do. For mosfets, I use this method HERE. The error amplifiers are SMD devices mounted under and in contact with the extended drain pin of the Mosfet. The mosfet drain is energized through the tab so the longer drain pin is no issue for local oscillation. And it gives close enough thermal bias compensation. Mosfets are more forgiving in that regard.🙂 HERE is that old thread as reference.
Your circuit appears to use non-Darlington BJT's, so I am not certain of the degree of thermal coupling necessary. You may have to build it, and trial & error till you get bias stability. I suspect that compensating both error devices will overcompensate, but then again BJT Gm is a bit higher at bias current so a bit of a guess I suppose.
Thermal coupling may need to be tighter than with mosfets.
HEC is a great circuit if implemented correctly. I have built it using both mosfets and Darlington BJT's. I found that with Darlington circuit it required both error amplifier devices to be on the heat sink, as both output and drivers are integrated and share the same die temperature. HERE is the Darlington version I did back in 2013 (Gosh, I can't believe it has been that long ago!
) the error amplifiers are TO-126, mounted next to outputs. The mosfet version does not require both error amplifiers to be mounted to heat sink due to lower Gm at bias current, usually one mounted will do. For mosfets, I use this method HERE. The error amplifiers are SMD devices mounted under and in contact with the extended drain pin of the Mosfet. The mosfet drain is energized through the tab so the longer drain pin is no issue for local oscillation. And it gives close enough thermal bias compensation. Mosfets are more forgiving in that regard.🙂 HERE is that old thread as reference.
Your circuit appears to use non-Darlington BJT's, so I am not certain of the degree of thermal coupling necessary. You may have to build it, and trial & error till you get bias stability. I suspect that compensating both error devices will overcompensate, but then again BJT Gm is a bit higher at bias current so a bit of a guess I suppose.
Thermal coupling may need to be tighter than with mosfets.
Thank you. In my simulation, if the error transistors, driver, and output at same temperature, the bias current will be decrease if temperature rise.
I try to use TO-126 like BD139/140 for error correction, but the result is not good as BC550/560. It may be because BD139/140 have lower hFE.
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Hi Bimo,
your design reminds me of what LKA did some time ago:
HEC amp
Not sure whether this has been built. Maybe ask LKA for his experience with bias stability.
In general, this output stage with error correction is a quad. This means many junctions to compensate, which is challenging.
As you know, BJT output stages are very sensitive to bias in order to have somewhat smooth gm in the crossover region. Any slight deviation worsens distortion considerably. With MOSFETs, the situation is much easier: They are less sensitive to bias (more is better) and error correction improves distortion even with bias drifting. I'm not sure whether EC with potential bias stability issues in BJT OPS is a good trade-off. Trading inherent linearity for more feedback may be not a good choice.
Using a diamond buffer like you do would allow to mostly cancel two Vbe of the quad by thermally coupling Q3+Q7 / Q4+Q8. Clever idea. I would probably put them on an extra radiator.
As previous posters explained, Q9 and Q10 can be used for sensing. Usually, R14 is used to set the bias. If you set bias using R31, I wonder whether it is good to set and sense at different location in the schematic. Of course, the CCS and mirrors also contribute to the overall tempco of the arrangement.
your design reminds me of what LKA did some time ago:
HEC amp
Not sure whether this has been built. Maybe ask LKA for his experience with bias stability.
In general, this output stage with error correction is a quad. This means many junctions to compensate, which is challenging.
As you know, BJT output stages are very sensitive to bias in order to have somewhat smooth gm in the crossover region. Any slight deviation worsens distortion considerably. With MOSFETs, the situation is much easier: They are less sensitive to bias (more is better) and error correction improves distortion even with bias drifting. I'm not sure whether EC with potential bias stability issues in BJT OPS is a good trade-off. Trading inherent linearity for more feedback may be not a good choice.
Using a diamond buffer like you do would allow to mostly cancel two Vbe of the quad by thermally coupling Q3+Q7 / Q4+Q8. Clever idea. I would probably put them on an extra radiator.
As previous posters explained, Q9 and Q10 can be used for sensing. Usually, R14 is used to set the bias. If you set bias using R31, I wonder whether it is good to set and sense at different location in the schematic. Of course, the CCS and mirrors also contribute to the overall tempco of the arrangement.
Thank you. I read the principle on Dr. Arto Kolinnumi's book, but without real schematic. The real schematic found in POA-2200 and POA-6600 by Denon. I do not have the schematics. Then I use this concept in simulation and found worked.
Lets wait LKA opinion.
Without error correction, BJT output can have very low distortion. I sim simmetry folded cascode with PSU 56VDC can achieve 0.000096% THD at 20kHz, 8 Ohm, 120W. But output with error correction can use simple IPS to get same result. Or we can use it for non global negative feedback.
correct
For To92 transistors, I use 5 mm holes in the main heatsink next to the power transistors.
Attachments
There seems to have been an oops with the negative feedback divider in the file and with unity gain the results are unclear for as shown the circuit would be working in Class A.
With regard to Q9 and Q10 I think these are a complementary part of the input stage with Q3 and Q4. The types used are high gain parts to start with and heating will accentuate this feature if these are on the heat sinks.
How these Q3 and Q4 would react with Q9 and Q10 would be unclear.
What may be interesting is that increasing the value of R14 has the net effect of shifting the base voltages of Q9 and Q10 so these are closer to the respective supply rail voltages (lessening vbe) - and in consequence the output stage dissipation is reduced.
Some thinking about a PTC network to replace R14 may be in order.