hey guys,
Ok I have been reading about Class D amplifier and how the output is connecting either full or half bridge.
If I go half bridge for example does that mean when using a gate driver it will need to be reference to the most negative rail, right.
For example if my PWM is 10Vpp and my most negative rail is -40, then I would have to level shift this 10Vpp at -40V. Basically at -40V I would have the 10Vpp.
But I don't understand how this would an input to the gate driver. since I would need a minimum of 3.3V logic for input.
I"am confused
Ok I have been reading about Class D amplifier and how the output is connecting either full or half bridge.
If I go half bridge for example does that mean when using a gate driver it will need to be reference to the most negative rail, right.
For example if my PWM is 10Vpp and my most negative rail is -40, then I would have to level shift this 10Vpp at -40V. Basically at -40V I would have the 10Vpp.
But I don't understand how this would an input to the gate driver. since I would need a minimum of 3.3V logic for input.
I"am confused