Giving class D a try

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Circuit:

http://myweb.msoe.edu/williamstm/Class_D_Amp_Schematic.pdf

Note: comparator is actually LM393. Compensation network changed since the simulation (which naturally didn't work IRL).

Solder side:

An externally hosted image should be here but it was not working when we last tested it.


The filter choke and bypass caps are not shown in the schematic.

Boring component side:

An externally hosted image should be here but it was not working when we last tested it.


Choke is quadfilar wound 29AWG, 25 turns on T51-52C, wired for differential mode (bifilar 47uH per winding). At 120kHz it gets fairly warm (datasheet says ~0.75W core loss). The output transistors also burn about a watt each, due to switching loss (the driver needs an emitter follower).

Typical output waveform:

An externally hosted image should be here but it was not working when we last tested it.


Lots of ringing due to the filter. Ripple cleans up fairly well with additional filtering. Response doesn't seem to be very linear, no thanks to RFI and ground loop problems I didn't allow for in the layout. Looks like switching noise causes the oscillator to trigger sooner, which modulates frequency and PWM in a lumpy way. The error amp helps, but its gain is necessarily low, so it's not very effective at most audio frequencies.

Despite its shortcomings, it makes audio. It has a certain charm at low frequencies, and it's very gratifying to watch the power supply on the oscilloscope, watching it brown out on the bass drums.

Has much worse PSRR than I would like, and complex signals (like guitar harmonics with cymbal crashes) result in awful screeching sounds (IMD and whatnot).

Tim
 
Weird circuit:confused: And that layout is just horrible, no wonder it doesent work properly.

Layout is the number one priority in class d. What switching frequency are you using ?

Im not too sure about the use of P and N fets rather than all N channel output stage, only seen this in very cheap and older stuff.

Im sure Eva will have a few words to say about this thing.
 
FDS8333 is pretty handy, 0.1 ohm Rds(on) "complementary" pair (as complementary as MOS can be). It's like an ordinary CMOS inverter (cf. CD4069UBE), with twice the voltage handling and 4000 times more silicon! Complementary FETs are wonderful when you're working under 20V. No need for bootstrap.

Switching at 120kHz, 150ns rise/fall time. (Next revision gets emitter followers, as noted, which should push it to 50ns.)

Tim
 
This circuit is not a good starting point, and the layout is terrible, it looks like done without being aware of the HF current paths, and PCB track and component lead inductances at all :)

SMD is a step in the right direction, though, except for output capacitors due to the lack of linearity of all dielectrics except NP0/C0G.
 
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Yes, the long traces and the absence of ground plane results in high trace inductances, so using parts with low inductances does not make much of a difference, but it's not bad as a first try.

The output MOSFET are not bad at all. Output inductor may require a better core material like -2. A reasonably fast comparator like the inexpensive LM319 or TL3016 is also required, and a better level shifting and gate drive scheme.

Buffering/amplifying the totem pole outputs of a TL3016 and coupling them capacitively to the gates may work (with some limitations, but minimum delay).

The coil for supply rail EMI filtering is ok, but the configuration is not good. The diode in parallel should be removed, and one pi filter (CLC) should be placed on each rail. These MOSFET are more than adequate for hard switching, their body diodes don't store any substantial charge.
 
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Erm, the L+D is for shorting-mode commutation, not RFI. RLD snubber, without an extra resistor, since commutation duty cycle is low. You can't get away with bypassed supply rails when you drive the gates together and supply is over ~5V. I've tried it before, and measured the 20A peak pulses myself! This limits commutation current to an amp or two, on par with signal current.

Too bad I don't have any #2 cores. I'll probably go with gapped ferrite next time. The high Q could be troublesome for compensation though, since it removes feedforward action. The capacitors may not be C0G, but X7R isn't bad, and it's got plenty low ESR. I use 50V ceramics so linearity is of no concern at 12V.

If you're interested, revision 2 is here:
http://myweb.msoe.edu/williamstm/ClassD2_Schematic.pdf
Supply filtering and output CM choke also included.

Board:
http://myweb.msoe.edu/williamstm/ClassD2.pdf
(with ground plane this time!)

Tim
 
Improved model:

An externally hosted image should be here but it was not working when we last tested it.


Oscillator/error amp filter added as through-hole this time. Other toroid (top) is a common mode choke, which cleans up the ugly waveforms.

An externally hosted image should be here but it was not working when we last tested it.


The four small copper areas are the emitter follower drivers, which push the gates around in about 50ns, reducing switching loss.

Compensation is a pole-zero at 50kHz, which brings loop gain to unity as the output filter hits resonance (90 degrees), dodging the phase shift a bit in the process. Overall gain droops slightly at 20kHz, peaks again at 50k, then drops past there (aside from hetrodyning effects around 125kHz, 250kHz, etc.). Square wave response is as reasonable as can be expected. No squirrely behavior was observed, unlike the previous version (which had a sinuous transfer curve due to supply ringing). Clipping behavior is quite reasonable. Large signal HF response (e.g. 10kHz triangle) doesn't look very good, because the error amp has low gain at that level. In fact, the triangle response resembles the oscillator waveform, which should come as no surprise since it's an RC oscillator. The next improvement should use current sources in the oscillator. Heck, open loop performance may then be sufficient without the error amp.

I'm particularly proud of this PCB, as it aligned *perfectly*. The 20 mil via holes are right in the center of their pads, top and bottom. Last two-sided board I made ended up with a bit of offset.

Tim
 
Why?

It makes placing SMTs much easier.

Tim

You did a good layout of the components, I understand that you did not cover (color solder) so as not to oxidize the copper, in this case you can use transparent color spray to protect (only has 2 pF / cm).
tin has a high electrical resistance (very poor conductor) compared to copper, it is known that electrons propagate in the surface of the conductor (not in).
 
Ah, but the surface that's carrying the most current is the *inside* surface, because the same current (give or take) appears as an image on the ground plane, on its inside surface as well. For a 2oz board, skin effect starts taking effect above 1MHz, and the plating won't matter until 10MHz (remember, the skin depth in solder is deeper than in copper, so it is still deep enough to reach the copper anyway). Harmonics past 100MHz in this circuit carry negligible power. For that matter, I don't *want* harmonics that high, they're an EMC hazard. If tinned boards help reduce RFI, it's a good thing!

Tim
 
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