I tried simulating the SU-9070 flat amp. The compensation arrangement baffles me.
Stripped of all the compensation caps, it's a pretty classic case of hitting -180 deg. phase well before the open loop gain falls to zero. However, neither the scheme in the schematic nor anything I could come up with will work to tame it.
Any ideas?
Stripped of all the compensation caps, it's a pretty classic case of hitting -180 deg. phase well before the open loop gain falls to zero. However, neither the scheme in the schematic nor anything I could come up with will work to tame it.
Any ideas?
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R303-C301 are absolutely required in a setup like this. The point is to flatten out FET input stage response around crossover, so that you have a decent chance of obtaining a first-order response for the whole thing if the rest already was Miller compensated before. It's like tacking an input stage onto an opamp. All kinds of joy in sim.
I'd say try it without the FET input stage first, and some more accurate transistor models might not hurt either - the differential stages look rather sensitive to parts changes. I also wouldn't recommend non-cascoded FETs in the input of a line-level stage unless you know exactly what you're doing.
I'd say try it without the FET input stage first, and some more accurate transistor models might not hurt either - the differential stages look rather sensitive to parts changes. I also wouldn't recommend non-cascoded FETs in the input of a line-level stage unless you know exactly what you're doing.
Ugh. I see it now, yes.
I'll hack off the JFET input stage and see where it goes from there.
Thanks!
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