With this circuit, I need a steady DC voltage out of the second opamp (I'd have preferred 4V, but that said, not too fussed what the DC level is , just so long as it's steady!) But what I'm getting at the moment is the DC level stepping up/down to a different DC level when the 'polarity invert' jfet is switched on/off.
I guess that 3.9V at the +ve input to the first opamp (pin 3 ) is the root of the problem - presumably from the bias current flowing through R1 causing the bias voltage to drop .01V across r1 ....so I really need a way of making that pin 3 a solid 4V DC (the problem here is my main supply rail is not regulated so I can't use a simple potential divider off that to present 4V at the +ve pin 3 of the first opamp)
Top tips gratefully received!.
All voltages are DC levels (the AC signal is not important here)
[IMGDEAD]http://img842.imageshack.us/img842/1973/circuite.jpg[/IMGDEAD]
I guess that 3.9V at the +ve input to the first opamp (pin 3 ) is the root of the problem - presumably from the bias current flowing through R1 causing the bias voltage to drop .01V across r1 ....so I really need a way of making that pin 3 a solid 4V DC (the problem here is my main supply rail is not regulated so I can't use a simple potential divider off that to present 4V at the +ve pin 3 of the first opamp)
Top tips gratefully received!.
All voltages are DC levels (the AC signal is not important here)
[IMGDEAD]http://img842.imageshack.us/img842/1973/circuite.jpg[/IMGDEAD]
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