Current mirror load in a LTP

Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
How does using a current mirror as a load for a LTP double the gm of the stage?

Lets say the LTP has a 2mA tail current source. I can see how the mirror would balance the two halves during quiescent conditions, but I've read that the mirror will double the transconductance of the stage. How? In Bob Cordell's book he talks about how in the simpler resistance loaded LTP, the gain of the inverting half is being thrown away, but anyway I think about it, the two sides are still juggling the same 2 mA back and forth.

Any thoughts?
 
The transconductance of an LTP is differential: half from each side. This is because the input signal voltage is differential: half to each side. A current mirror takes the signal current from one side and presents it at the collector of the other side. You thus get the whole signal current: half from one collector, half (via the current mirror) from the other collector.

Whether you call this 'doubling gm' or 'avoiding halving gm' is a matter of semantics.
 
Ok, I spent a bunch of time with SPICE and I think I have it, but I would like a double check.

Take a LTP with 2mA of tail current and a mirror for a load. With no signal present, the input side of the mirror ensures that the other side has the same current and 1mA flows through both sides.

Now take positive swing at the input (I had the other sides base grounded for my simulations). Being a PNP transistor, the positive swing causes less current to flow in that side and that much more to flow in the other side. The current on the unused side of the LTP goes up and the mirror programs the other side to be able to sink that much more current.

Then on a negative input swing, the side receiving the signal draws more current, the opposite side draws that much less, and by way of the mirror, the side being used sinks that much less and instead the extra is used to drive the VAS.

Am I getting it?

As an aside, when I remove the feed back loop, the current from the IPS is a perfect sine wave, but the voltage is horribly distorted. Is this caused by the change of the VAS transistor's re' with current swing, and thus the fact that the load for the IPS is constantly changing? I guess I knew that would be the case but underestimated the sevarity. It is pretty amazing that NFB cleans that up so much!

I plan to start playing with different VAS topologies next, but want to fully understand this current mirror stuff first.
 
Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.